Vertical Memory Isolation Pattern Reduces Channel Coupling

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Solution Overview

Problem

In the manufacturing of vertical memory devices, a coupling phenomenon occurs between the channel and the dummy channel, leading to degradation of electrical characteristics.

Innovation Solution

A vertical memory device design featuring a substrate with columns of vertical channels, charge storage structures, and gate electrodes, including a ground selection line, word line, and string selection line, with an isolation pattern that reduces coupling between the channel and dummy channel by using insulation materials and specific structural configurations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If dummy channels are disposed in the region where gate electrodes are separated, then the device structure is completed, but coupling phenomenon occurs between channel and dummy channel degrading electrical characteristics

Engineering Contradiction:
Improvedevice structure completionVSAvoidelectrical characteristics
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

An isolation pattern is introduced as an intermediary structure between the vertical channel and dummy channel. This isolation pattern includes vertical extension portions that extend from the substrate surface to a height lower than the charge storage structures, and connection portions that connect adjacent vertical extension portions. The isolation pattern acts as a mediator to prevent direct coupling between the channel and dummy channel, thereby improving electrical characteristics while maintaining device structure completion.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The isolation pattern is segmented into vertical extension portions and connection portions. The vertical extension portions are disposed between the vertical channel and dummy channel, while the connection portions connect adjacent vertical extension portions. This segmentation allows the isolation structure to effectively block coupling between channel and dummy channel while maintaining structural integrity and ease of manufacture.

Inventive Principle:
Principle #1Segmentation

2Reliability

If isolation pattern is added to reduce coupling between channel and dummy channel, then electrical characteristics are improved, but device complexity increases

Engineering Contradiction:
Improveelectrical characteristicsVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The isolation pattern is divided into vertical extension portions and connection portions, where vertical extension portions provide the primary isolation function between channel and dummy channel, and connection portions provide structural support by connecting adjacent vertical extension portions. This segmentation allows for a relatively simple fabrication process while achieving effective isolation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The isolation pattern uses a regular, repeating structure where vertical extension portions are uniformly disposed between vertical channels and dummy channels at consistent intervals. This copying of the same structural motif throughout the device reduces fabrication complexity while maintaining effective isolation across the entire device area.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS9905572B2Vertical memory devices with vertical isolation structures and methods of fabricating the same
Publication Date: 2018.02.27 SAMSUNG ELECTRONICS CO LTD
  • US9905572B2 patent drawing
  • US9905572B2 patent drawing
  • US9905572B2 patent drawing

AI summary

A vertical memory device includes a substrate, a column of vertical channels on the substrate and spaced apart along a direction parallel to the substrate, respective charge storage structures on sidewalls of respective ones of the vertical channels and gate electrodes vertically spaced along the charge storage structures. The vertical memory device further includes an isolation pattern disposed adjacent the column of vertical channels and including vertical extension portions extending parallel to the vertical channels and connection portions extending between adjacent ones of the vertical extension portions.