Vertical Memory Cell Layout With 3D Resistor Contacts

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Solution Overview

Problem

Existing memory devices face challenges in increasing data storage capacity and ensuring circuit stability while minimizing device size.

Innovation Solution

A vertical memory device with three-dimensionally arranged memory cells and a resistor formed as a contact of a vertical structure, featuring resistance contact structures with higher resistivity than conventional contacts, to reduce parasitic resistance and ensure circuit stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional contact structures are used in peripheral circuits, then the device size can be reduced, but parasitic resistance increases and circuit stability deteriorates

Engineering Contradiction:
Improvecircuit stabilityVSAvoidparasitic resistance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent transforms the conventional two-dimensional contact structure into a three-dimensional vertical contact structure that extends in the third direction (vertical direction) through the peripheral circuit region. This dimensional change allows the contact structure to overlap with memory cell structures in the first direction, reducing parasitic resistance by providing multiple contact paths while maintaining a compact footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The contact structure uses composite materials with different resistivities in different regions. The first contact structure has a first resistivity, while the second contact structure has a second resistivity that is lower than the first resistivity. This composite approach allows optimization of electrical properties in different parts of the contact structure to minimize overall parasitic resistance.

Inventive Principle:
Principle #40Composite materials

2Reliability

If vertical contact structures with higher resistivity materials are used, then circuit stability is improved, but device complexity increases

Engineering Contradiction:
Improvecircuit operation stabilityVSAvoidcontact structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The contact structure is segmented into multiple distinct parts: a first contact structure and a second contact structure, each with different material compositions and resistivities. This segmentation allows each segment to be optimized for its specific function while maintaining overall structural integrity and simplifying the design process through modular construction.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the contact structure have different material properties tailored to their specific requirements. The first contact structure uses a material with higher resistivity for stability, while the second contact structure uses a material with lower resistivity for reduced parasitic effects. This local quality optimization ensures each part performs its function efficiently without requiring the entire structure to be overly complex.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12581669B2Vertical memory device
Publication Date: 2026.03.17 SAMSUNG ELECTRONICS CO LTD
  • US12581669B2 patent drawing
  • US12581669B2 patent drawing
  • US12581669B2 patent drawing

AI summary

A memory device including a first substrate extending in a first direction and a second direction perpendicular to the first direction, the first substrate including a memory cell region and a first peripheral circuit region, and a second substrate, including a second peripheral circuit region, extending in the first and second direction, the second substrate overlapping the first substrate in a third direction perpendicular to the first and second direction. The memory device also including a memory cell array disposed in the memory cell region and including a plurality of vertical channel structures extending in the third direction, a peripheral circuit disposed in the second peripheral circuit region, and a resistor extending in the third direction through the first peripheral circuit region and the second peripheral circuit region. The resistor including a plurality of resistance contact structures overlapping the plurality of vertical channel structures in the first direction.