Non-volatile Resistive Memory Cells with Vertical Memristive Structures
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Solution Overview
Problem
The design and manufacture of non-volatile resistive memory cells, particularly in crossbar memory arrays, face challenges such as maintaining switching characteristics over multiple cycles, protecting switching elements from damage and contamination during fabrication, and achieving reliable operation with reduced OFF state currents and improved data retention.
Innovation Solution
The formation of memristive materials as switching elements on both the sidewalls and within the structure of non-volatile resistive memory cells, with a protective spacer material to shield against subsequent processing steps, and the strategic deposition of these elements later in the fabrication process to minimize damage and contamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If switching elements are formed early in the fabrication process, then fabrication efficiency is improved, but the switching elements suffer from damage and contamination from subsequent processing steps
Solution Approach 1:
The patent applies preliminary action by forming the switching element later in the fabrication process after protective layers are deposited. This timing strategy ensures that the switching element is not exposed to damage and contamination from subsequent processing steps, while still maintaining fabrication efficiency through optimized process sequencing.
Solution Approach 2:
The patent implements beforehand cushioning by depositing protective layers (such as dielectric layers or spacer materials) before forming the switching element. These protective layers act as a cushion that prevents damage and contamination from subsequent processing steps, ensuring the switching element remains intact throughout fabrication.
2Reliability
If protective layers are deposited before forming switching elements, then switching element protection is improved, but fabrication complexity increases
Solution Approach 1:
The patent applies universality by designing protective layers that serve multiple functions: they protect the switching element from damage and contamination, define the geometry of the switching element through spacer formation, and provide structural support. This multi-functionality reduces the need for additional dedicated protective structures, thereby limiting the increase in fabrication complexity.
Solution Approach 2:
The patent uses intermediary materials (such as dielectric layers or sacrificial layers) that mediate between the fabrication process and the switching element. These intermediaries are deposited, patterned, and removed in a controlled manner to protect the switching element without requiring complex fabrication steps. The intermediary layers are designed to be easily deposited and removed using standard semiconductor fabrication techniques.
3Manufacturing precision
If switching elements are formed with larger dimensions, then manufacturing precision is improved, but OFF state currents increase
Solution Approach 1:
The patent applies local quality by creating non-uniform switching element structures where different regions have different properties. Specifically, the switching element is designed with a narrower region (constriction) that locally limits the current path. This local narrowing reduces OFF state currents while maintaining larger overall dimensions for better manufacturing precision and control.
Solution Approach 2:
The patent uses dimensionality change by transitioning from a two-dimensional planar structure to a three-dimensional structure with vertical confinement. The switching element is formed with controlled height and cross-sectional area, creating a nanoscale constrict ion that effectively reduces OFF state currents. This vertical dimension provides an additional degree of freedom for controlling current flow without compromising lateral manufacturing precision.
Data Source
AI summary
Examples of the present disclosure include non-volatile resistive memory cells and methods of forming the same. An example of a non-volatile resistive memory cell includes a first portion of the non-volatile resistive memory cell formed as a vertically-extending structure on a first electrode, where the first portion comprises at least one memristive material across a width of the vertically-extending structure. The non-volatile resistive memory cell also includes a second portion formed as a vertically-extending memristive material structure on at least one sidewall of the first portion.