Vertical Nanowire Transistor Axial Composition Grading
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Solution Overview
Problem
Conventional MOSFETs, both laterally and vertically oriented, face challenges in achieving high drive current and low leakage currents due to the difficulty in controllably fabricating distinct source/drain materials, particularly at the minute lateral spacings involved in transistor scaling.
Innovation Solution
The implementation of vertically oriented nanowire MOSFETs with compositional differentiation along the longitudinal length of the transistor, utilizing epitaxial and atomic layer deposition processes to vary the semiconductor and gate electrode compositions parallel to the current flow, enabling enhanced drive and leakage current performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional lateral MOSFET fabrication is used, then manufacturing simplicity is maintained, but drive current and leakage current performance deteriorate due to difficulty in fabricating distinct source/drain materials at minute lateral spacings
Solution Approach 1:
The patent transitions from lateral MOSFET architecture to vertical nanowire MOSFET architecture, changing the spatial dimension of current flow from horizontal to vertical. This dimensional change enables the channel to be surrounded by the gate on all sides (gate-all-around configuration), providing superior electrostatic control and enabling distinct source/drain material fabrication through vertical epitaxial growth rather than lateral processing.
Solution Approach 2:
The patent implements compositional differentiation along the longitudinal axis of the nanowire, with the channel region having a first composition (e.g., SiGe) and the drain region having a second composition (e.g., Si). This local compositional variation optimizes carrier mobility in the channel while managing hot carrier effects in the drain, achieving superior current performance through spatially differentiated material properties.
2Reliability
If vertically oriented MOS transistors with homogenous crystalline composition are used, then fabrication simplicity is maintained, but drive current and leakage current performance offers little advantage over planar devices
Solution Approach 1:
The patent changes the compositional parameter along the longitudinal axis of the nanowire channel, transitioning from homogenous composition to axially varying composition. The channel region contains a first composition (e.g., SiGe with higher germanium content for enhanced mobility) while the drain region contains a second composition (e.g., Si with lower germanium content). This parameter change is achieved through controlled epitaxial growth conditions, enabling superior device performance without requiring complex multi-step fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in higher 'on-state' currents and lower 'off-state' currents compared to conventional transistors, with improved control over critical dimensions and material properties, leading to increased transistor efficiency.
Implementation Method 1
utilizing epitaxial and atomic layer deposition processes to vary the semiconductor and gate electrode compositions parallel to the current flow
Implementation Method 2
utilizing epitaxial and atomic layer deposition processes to vary the semiconductor and gate electrode compositions parallel to the current flow
Data Source
AI summary
Vertically oriented nanowire transistors including semiconductor layers or gate electrodes having compositions that vary over a length of the transistor. In embodiments, transistor channel regions are compositionally graded, or layered along a length of the channel to induce strain, and/or include a high mobility injection layer. In embodiments, a gate electrode stack including a plurality of gate electrode materials is deposited to modulate the gate electrode work function along the gate length.