Vertical RAM Selectors Block Parasitic Currents

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Solution Overview

Problem

Conventional RAM devices with cross-point cell configurations experience parasitic currents through non-selected memory cells, leading to incorrect readings and unwanted writing, which affects the accuracy and reliability of memory operations.

Innovation Solution

The development of vertical RAM devices with selectors, featuring a vertical structure and selector elements like diodes, which help eliminate sneak paths by ensuring precise control over memory operations and increasing memory density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a cross-point cell configuration is used, then memory density is increased, but parasitic currents flow through non-selected memory cells causing incorrect readings and unwanted writing

Engineering Contradiction:
Improvememory densityVSAvoidparasitic current
Core Design Contradiction:
Quantity of substanceVSObject-generated harmful factors

Solution Approach 1:

A selector element is introduced as an intermediary component between the memory element and the bit line. This selector element acts as a gatekeeper that controls current flow, allowing current to pass only when the selected memory cell is activated by the appropriate word line and bit line combination, thereby blocking parasitic currents from flowing through non-selected cells while maintaining high memory density through the vertical cross-point architecture

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-generated harmful factors

If vertical structure with selectors is used, then parasitic currents are reduced, but device complexity increases

Engineering Contradiction:
Improveparasitic currentVSAvoiddevice structure
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The memory structure transitions from a planar two-dimensional cross-point configuration to a vertical three-dimensional architecture. Memory elements are stacked vertically along the bit line, with word lines extending perpendicular to the bit line at different vertical levels. This vertical stacking allows multiple memory cells to share common bit lines and control circuitry, reducing the overall footprint and potentially offsetting the added complexity of selector elements through improved spatial utilization

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The vertical RAM design with selectors effectively reduces parasitic currents, enhancing memory accuracy and density while maintaining low energy consumption, thereby improving the performance and reliability of memory devices.

Implementation Method 1

The selector element includes respective first and second selector diodes for the first and second memory elements of each of the one or more cell stacks

Methodology Applied
Scientific EffectDiode: Diode

Data Source

PatentUS10186554B2Vertical random access memory with selectors
Publication Date: 2019.01.22 GLOBALFOUNDRIES SINGAPORE PTE LTD
  • US10186554B2 patent drawing
  • US10186554B2 patent drawing
  • US10186554B2 patent drawing

AI summary

Devices and methods for manufacturing a device are presented. The device includes a substrate and a vertical structure disposed over the substrate. The vertical structure includes one or more memory cell stacks with a dielectric layer between every two adjacent cell stacks. Each of the one or more cell stacks includes first and second first type conductors on first and second sides of the cell stack, respectively; first and second electrodes, the first electrode adjacent the first first type conductor, the second electrode adjacent the second first type conductor; and first and second memory elements, the first memory element disposed between the first first type conductor and the first electrode, the second memory element disposed between the second first type conductor and the second electrode. The device also includes a selector element disposed over the substrate and vertically traversing through a middle portion of the vertical structure. The selector element includes respective first and second selector diodes for the first and second memory elements of each of the one or more cell stacks.