Vertical Semiconductor Structure With Dielectric Supporter Replacement
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Solution Overview
Problem
Existing semiconductor devices face challenges in improving reliability and efficiency, particularly in the fabrication process of vertical semiconductor devices like 3D NAND, where the removal of sacrificial layers and formation of dielectric supporters are not effectively addressed.
Innovation Solution
A method involving the formation of sacrificial pads and plugs followed by their replacement with dielectric supporters, along with the creation of alternating stacks of dielectric and sacrificial layers, and subsequent replacement with gate electrodes, enhances the structural integrity and reliability of the semiconductor device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If sacrificial layers are replaced in vertical semiconductor structures, then gate electrodes can be formed, but underlying structures may be damaged during the replacement process
Solution Approach 1:
The method performs preliminary actions by forming protective structures (such as spacer layers and protective films) before replacing the sacrificial layers. This ensures that the underlying structures are protected in advance during the subsequent sacrificial layer removal process, preventing damage while enabling gate electrode formation.
Solution Approach 2:
The patent introduces intermediary protective layers and structures that act as mediators between the sacrificial layers and the underlying structures. These intermediary elements protect the underlying structures during the sacrificial layer replacement process, allowing the gate electrodes to be formed without causing damage.
2Manufacturing precision
If complex alternating stacks of dielectric and sacrificial layers are formed, then gate electrodes can be precisely positioned, but the fabrication process becomes more complex
Solution Approach 1:
The fabrication process is segmented into distinct stages: forming the alternating stack of dielectric and sacrificial layers, selectively removing specific sacrificial layers, and forming gate electrodes in controlled steps. This segmentation allows precise positioning of gate electrodes while managing the overall process complexity through systematic breakdown of operations.
Solution Approach 2:
The alternating stack of dielectric and sacrificial layers is formed in advance as a preliminary structure that defines the precise positions where gate electrodes will later be formed. This preliminary action establishes the spatial framework for precise gate electrode positioning before the actual electrode formation occurs.
Data Source
AI summary
A method for fabricating a semiconductor device includes forming a source structure over a lower structure with interconnections; forming a first contact plug that penetrates the source structure to be coupled to the interconnections, and a first sacrificial pad that penetrates the source structure and is spaced apart from the first contact plug; forming an upper structure that covers the first sacrificial pad, the first contact plug, and the source structure; forming a second contact plug that penetrates the upper structure and contacts the first contact plug, forming a second sacrificial pad that penetrates the upper structure to contact the first sacrificial pad and is spaced apart from the second contact plug; and replacing the first sacrificial pad and the second sacrificial pad with a dielectric supporter.