Vertical Semiconductor Memory Device With Stacked Doped Films
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Solution Overview
Problem
Current semiconductor memory devices face challenges in achieving high integration and reliability due to limitations in miniaturizing memory cells while maintaining high integration density.
Innovation Solution
A semiconductor memory device is designed with a three-dimensional structure, featuring a word line, a sensing line, and a vertical semiconductor structure with a gate dielectric film. The vertical semiconductor structure includes sequentially stacked doped films of different conductivity types, allowing for a compact and high-density memory cell arrangement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If memory cells are miniaturized using traditional two-dimensional structures, then device size decreases, but integration density and reliability deteriorate due to density constraints
Solution Approach 1:
The patent transitions from traditional two-dimensional planar memory cell structures to three-dimensional vertical structures. The memory cells are stacked vertically with word lines, bit lines, and channel regions arranged in multiple layers, enabling higher integration density without further miniaturizing individual cell footprints. This dimensional change allows continued scaling while maintaining reliability through improved electrical isolation and reduced interference between adjacent cells.
2Quantity of substance
If memory cells are further miniaturized, then integration density increases, but manufacturing precision and reliability deteriorate
Solution Approach 1:
The memory device is divided into multiple discrete vertical layers including first and second word lines, bit lines, channel regions, and insulating films stacked in sequence. Each layer can be independently formed and controlled during fabrication, allowing precise manufacturing of complex three-dimensional structures without requiring extreme miniaturization of individual components. The segmented vertical architecture enables step-by-step fabrication processes.
Solution Approach 2:
Different regions of the memory device exhibit specialized properties: channel regions are positioned at specific locations to enable selective access, insulating films are placed between conductive layers for electrical isolation, and the vertical stacking creates localized functional units. This spatial differentiation of properties allows high integration density while maintaining manufacturability through targeted material placement and localized processing.
3Ease of manufacture
If traditional two-dimensional structures are used, then manufacturing is simpler, but integration density is constrained
Solution Approach 1:
The patent employs vertical stacking of memory cell components along the third dimension (z-axis), creating multi-layer three-dimensional structures. Word lines, bit lines, and channel regions are arranged in vertical columns with insulating films between layers. This vertical integration multiplies the effective storage capacity within the same lateral footprint, achieving high integration density while using fabrication techniques similar to conventional planar processes extended to multiple layers.
Data Source
AI summary
A semiconductor memory device is provided. The semiconductor device includes: a word line extending in a lateral direction; a sensing line apart from the word line, the sensing line overlapping the word line in a vertical direction and extending in the lateral direction; a vertical semiconductor structure passing through the word line and the sensing line in the vertical direction, the vertical semiconductor structure having a vertical channel region facing the word line in the lateral direction; and a gate dielectric film between the vertical channel region and the word line. The vertical semiconductor structure includes a first heavily doped film of a first conductivity type, a first lightly doped film of a second conductivity type, a second lightly doped film of the first conductivity type, and a second heavily doped film of the second conductivity type, which are sequentially provided in the vertical direction.