Vertical Semiconductor Device Passivation Thickness Variation
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Solution Overview
Problem
Power semiconductor devices face challenges in maintaining robustness against external charges and moisture-related corrosion, particularly in high-temperature tests, due to changes in electrical properties such as breakdown voltage, which are affected by mobile charges and corrosion of metal electrodes.
Innovation Solution
A vertical semiconductor device design featuring a semiconductor body with a peripheral area having a passivation structure with varying thickness, including a first portion covering the inner conductive regions and a second portion covering the outer conductive regions, which differ in layer composition and thickness, and a field plate arrangement to enhance robustness and corrosion resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a uniform thick passivation structure is used to protect against moisture-related corrosion, then corrosion resistance is improved, but robustness against external charges deteriorates due to charge accumulation at the edge termination
Solution Approach 1:
The patent applies local quality by implementing a passivation structure with varying thickness across different regions. The inner peripheral area has a first thickness while the outer peripheral area has a second thickness that is smaller than the first. This allows the inner region to provide corrosion protection while the outer region reduces charge accumulation effects, thereby resolving the contradiction between corrosion resistance and robustness against external charges.
2Reliability
If the passivation layer thickness is increased to improve robustness against external charges, then charge accumulation is reduced, but moisture-related corrosion protection deteriorates
Solution Approach 1:
The patent resolves this contradiction by applying different passivation thicknesses to different regions. The inner peripheral area maintains a larger first thickness for charge management, while the outer peripheral area uses a smaller second thickness to preserve corrosion protection. This spatial differentiation allows both requirements to be satisfied simultaneously in their respective regions.
3Ease of manufacture
If a single-layer passivation structure is used to simplify manufacturing, then manufacturing complexity is reduced, but the ability to simultaneously address corrosion and charge robustness deteriorates
Solution Approach 1:
The patent implements local quality through a passivation structure with at least two different thicknesses in different regions. This can be achieved through selective etching or deposition processes applied to a initially uniform passivation layer, or through sequential deposition of layers with different thicknesses. The resulting structure provides region-specific protection characteristics that enable simultaneous optimization of corrosion resistance and charge robustness.
Data Source
AI summary
A semiconductor body includes first and second opposing surfaces, an edge extending in a vertical direction substantially perpendicular to the first surface, an active area, a peripheral area arranged in a horizontal direction substantially parallel to the first surface between the active area and edge, and a pn-junction extending from the active area into the peripheral area. In the peripheral area the semiconductor device further includes a first conductive region arranged next to the first surface, a second conductive region arranged next to the first surface, and arranged in the horizontal direction between the first conductive region and edge, and a passivation structure including a first portion at least partly covering the first conductive region, a second portion at least partly covering the second conductive region. The first portion has a different layer composition than the second portion and/or a thickness which differs from the thickness of the second portion.