Vertical Side Wall Active Pins for Phase Change Memory Reset Current Reduction

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Solution Overview

Problem

Manufacturing high-density memory devices with small dimensions and tight process variations is challenging, particularly in reducing the reset current required for phase change materials in memory cells, which is essential for large-scale memory devices.

Innovation Solution

A memory cell structure with narrow vertical side wall active pins made of programmable resistive material, such as phase change material, is developed, where the side wall active pins are formed by etching a layer of programmable resistive material along the insulating layer, minimizing the electrical current needed for phase changes between crystalline and amorphous states, and the dimensions are sublithographic, allowing for small reset current and low power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the size of phase change material element and contact area are reduced, then reset current is reduced, but manufacturing precision requirements become tighter

Engineering Contradiction:
Improvereset currentVSAvoiddimensional control
Core Design Contradiction:
Use of energy by moving objectVSManufacturing precision

Solution Approach 1:

The patent transitions from planar phase change material structures to three-dimensional vertical side wall pins. This dimensional change allows the active phase change material to be positioned in the vertical dimension along the sidewalls of bit lines, achieving small effective volume for low reset current while maintaining larger lateral dimensions for manufacturability. The side wall pins extend vertically from the substrate, creating a vertical storage node that reduces the horizontal footprint and contact area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements a nested structure where the phase change material is contained within recesses formed in the bit lines. The side wall pins are positioned within vertically separated bit lines, with the phase change material nested between conductive layers. This nesting allows the active material to be confined in a small volume while the overall structure maintains larger dimensions for process tolerance.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Use of energy by stationary object

If vertical side wall active pins with sublithographic dimensions are formed, then reset current and power consumption are reduced, but process variation control becomes more difficult

Engineering Contradiction:
Improvepower consumptionVSAvoidprocess variation
Core Design Contradiction:
Use of energy by stationary objectVSReliability

Solution Approach 1:

The patent introduces intermediate structures including sacrificial layers, spacer materials, and mandrel structures that mediate the formation of the final side wall pins. These intermediaries allow indirect definition of the phase change material dimensions through self-aligned processes. The spacer layers, in particular, act as intermediaries that define the width of side wall pins with precision determined by thin film deposition rather than lithography, achieving sublithographic dimensions with better process control.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces direct lithographic patterning with physical vapor deposition and self-aligned etching processes to define the dimensions of side wall pins. Instead of using photolithography to directly pattern the phase change material, the invention uses sequential deposition of spacer layers and anisotropic etching to create vertically oriented structures with dimensions controlled by film thickness rather than optical resolution, achieving better dimensional precision and reduced process variation.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The approach enables the creation of memory cells with reduced reset current and low power consumption, meeting tight specifications for large-scale memory devices by minimizing the size of the phase change material element and contact area between electrodes, thereby enhancing the efficiency and scalability of memory devices.

Implementation Method 1

Phase change based memory materials have at least two solid phases including, for example, a generally amorphous solid phase and a generally crystalline solid phase. Laser pulses are used in read-write optical disks to switch between phases and to read the optical properties of the material after the phase change.

Methodology Applied
Scientific EffectPhase change: Phase Change

Implementation Method 2

The change from the amorphous to the crystalline state is generally a lower current operation. The change from crystalline to amorphous, referred to as reset herein, is generally a higher current operation, which includes a short high current density pulse to melt or breakdown the crystalline structure, after which the phase change material cools quickly, quenching the phase change process

Methodology Applied
Scientific EffectJoule heating: Joule Heating

Data Source

PatentUS7932129B2Vertical side wall active pin structures in a phase change memory and manufacturing methods
Publication Date: 2011.04.26 MACRONIX INTERNATIONAL CO LTD
  • US7932129B2 patent drawing
  • US7932129B2 patent drawing
  • US7932129B2 patent drawing

AI summary

A programmable resistor memory, such as a phase change memory, with a memory element comprising narrow vertical side wall active pins is described. The side wall active pins comprise a programmable resistive material, such as a phase change material. In a first aspect of the invention, a method of forming a memory cell is described which comprises forming a stack comprising a first electrode having a principal surface with a perimeter, an insulating layer overlying a portion of the principal surface of the first electrode, and a second electrode vertically separated from the first electrode and overlying the insulating layer. Side walls on the insulating layer and on the second electrode are positioned over the principle surface of the first electrode with a lateral offset from the perimeter of the first electrode.