Vertical Stacked CMOS Image Sensor for Light Utilization and Noise Reduction
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Solution Overview
Problem
Conventional CMOS image sensors face limitations in light reception efficiency and design optimization due to the integration of photodiodes and in-pixel amplifier circuitries within the same semiconductor layer, leading to reduced optical fill factor, signal noise, and difficulties in layout optimization.
Innovation Solution
A photosensitive imaging apparatus with a vertical structure where photodiodes are separated from in-pixel amplifier circuitries, with the MOS transistors positioned under the photodiodes and connected via a bonding dielectric layer, allowing for improved light utilization and reduced noise, and using contact plugs for efficient interconnection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If photodiodes and in-pixel amplifier circuitries are integrated within the same semiconductor layer, then device integration is achieved, but optical fill factor is reduced and light reception efficiency decreases
Solution Approach 1:
The patent transitions from planar integration to three-dimensional stacking, placing the photosensitive semiconductor layer and pixel-circuitry semiconductor layer in different vertical layers. This dimensional change allows photodiodes to occupy the entire pixel area in the first layer while MOS transistors are positioned in the second layer, thereby maximizing optical fill factor while maintaining device integration.
2Device complexity
If photodiodes and in-pixel amplifier circuitries are integrated within the same semiconductor layer, then device integration is achieved, but design optimization and fabrication process optimization become more difficult
Solution Approach 1:
The patent divides the integrated device into two separate semiconductor layers: a photosensitive semiconductor layer containing photodiodes and a pixel-circuitry semiconductor layer containing MOS transistors. This segmentation allows independent design optimization and fabrication process optimization for each layer while maintaining functional integration through vertical stacking and bonding.
3Ease of operation
If MOS transistors are disposed in the same pixel as photodiodes, then in-pixel amplification is achieved, but footprint of MOS transistors limits photoelectric efficiency enhancement
Solution Approach 1:
The patent positions MOS transistors in a separate vertical layer (second semiconductor layer) beneath the photodiodes, allowing photodiodes to maximize their light-receiving footprint in the first layer while MOS transistors occupy space in the second layer. This vertical separation eliminates the footprint limitation while maintaining in-pixel amplification functionality through vertical interconnections.
4Illumination intensity
If photodiodes and in-pixel amplifier circuitries are separated into different semiconductor layers, then light utilization is improved, but interconnection complexity increases
Solution Approach 1:
The patent introduces a bonding dielectric layer as an intermediary between the photosensitive semiconductor layer and pixel-circuitry semiconductor layer. This bonding dielectric layer facilitates vertical interconnection through bonding and through-silicon vias, enabling efficient electrical connection between photodiodes and MOS transistors while managing the complexity of interconnection in the stacked architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances light utilization, reduces noise, and facilitates separate design and process optimization of photodetectors and amplifier circuitries, leading to improved performance and compatibility in the photosensitive imaging apparatus.
Implementation Method 1
a bonding dielectric layer for bonding the first semiconductor substrate and the second semiconductor substrate together
Implementation Method 2
The bonding dielectric layer may be reflective to light incident through the photosensitive semiconductor layer
Implementation Method 3
a photosensitive semiconductor layer including an array of photodetectors
Data Source
AI summary
A photosensitive imaging apparatus and a method of forming such an apparatus are disclosed. The apparatus includes: a first semiconductor substrate, including a photosensitive semiconductor layer including an array of photodetectors; and a second semiconductor substrate, stacked with the first semiconductor substrate and including a pixel-circuitry semiconductor layer including an array of in-pixel amplifier circuitries. Each in-pixel amplifier circuitry includes at least one first pixel MOS transistor. Each first pixel MOS transistor has an active region disposed between the gate layer thereof and the first semiconductor substrate. The photosensitive imaging apparatus allows an effective reduction in noises produced during light reception of the in-pixel amplifier circuitries and an increased light utilization of the photodetectors. In addition, by separating the pixel-circuitry semiconductor layer from the photosensitive semiconductor layer, the apparatus achieves better process compatibility and is conducive to separate design and process optimization of the in-pixel amplifier circuitries and the photodetectors.