Vertical Stacking Power Device Package for Compact Integration
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Solution Overview
Problem
Conventional power device packages face limitations in reducing size and increasing integration density due to horizontally mounted power and control semiconductor chips, which restricts the compactness and performance of power electronic devices.
Innovation Solution
A power device package is designed with substrates vertically stacked, where power semiconductor chips are mounted on one substrate and control semiconductor chips on another, connected via a lead frame and sealed with a member, allowing for compact design and enhanced integration density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If power semiconductor chips and control semiconductor chips are horizontally mounted on the lead frame, then the electrical connection and functionality are achieved, but the area of the power device package cannot be reduced and integration density is limited
Solution Approach 1:
The patent transitions from horizontal mounting of semiconductor chips to vertical stacking configuration. The power semiconductor chips are mounted on a first substrate, while control semiconductor chips are mounted on a second substrate positioned above the first substrate. This three-dimensional vertical arrangement reduces the planar area occupation while maintaining all necessary electrical connections through the lead frame, thereby achieving both area reduction and increased integration density.
2Area of stationary object
If substrates are vertically stacked to reduce package area, then compactness is improved, but the fabrication process complexity increases
Solution Approach 1:
The patent divides the package into two separate substrates (first substrate for power chips, second substrate for control chips) that are vertically stacked. This segmentation allows independent mounting and wiring of power and control circuits on separate planes, simplifying the overall fabrication process compared to integrating everything on a single horizontal plane. The lead frame is also segmented to provide electrical connections between the stacked substrates and external terminals.
Solution Approach 2:
The lead frame serves as an intermediary component that facilitates electrical connections between the vertically stacked substrates and provides external terminals. The lead frame includes connection portions that electrically connect the first substrate and second substrate, as well as external leads that extend outward for package connectivity. This intermediary structure simplifies the vertical interconnection process while maintaining electrical functionality.
Data Source
AI summary
Provided are a power device package, which can be made compact by vertically stacking substrates on which semiconductor chips are mounted, and a method of fabricating the power device package. The power device package includes: a first substrate comprising a first surface and a second surface opposite to each other, and a first wiring pattern formed on the first surface; one or more power semiconductor chips mounted on the first surface of the first substrate and electrically connected to the first wiring pattern; a second substrate vertically spaced apart from the first substrate and comprising a second wiring pattern; one or more first control semiconductor chips mounted on the second substrate and electrically connected to the second wiring pattern; a lead frame electrically connected to the first wiring pattern and the second wiring pattern; and a sealing member sealing the first substrate, the power semiconductor chips, the second substrate, the first control semiconductor chips, and at least a part of the lead frame so as to expose the second surface of the first substrate.