Vertical Double-Gate Storage Cell Structure for Leakage Suppression
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Solution Overview
Problem
The increasing integration and reduction in size of storage devices lead to higher leakage currents, particularly in horizontal devices, which affect their performance.
Innovation Solution
A vertical storage device design is implemented, featuring a vertical stack of source/drain layers and a channel layer with a double-gate structure, optimized to enhance the on-current while minimizing leakage current, utilizing epitaxial growth for precise channel thickness and gate length control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the storage device uses a horizontal design, then the manufacturing process is simpler, but the leakage current increases significantly
Solution Approach 1:
The patent transitions from a horizontal device architecture to a vertical device architecture. The active region extends in the third direction (vertical direction) inclined with respect to the first direction, creating a vertical stack structure where the channel layer is positioned between source/drain layers in the vertical dimension. This dimensional change fundamentally reduces leakage current while maintaining manufacturability through controlled epitaxial growth processes.
2Quantity of substance
If the storage device integrates more units, then the storage capacity increases, but the leakage current increases
Solution Approach 1:
The vertical stack structure allows multiple storage units to be integrated in the vertical dimension rather than only in the planar dimension. Each storage unit comprises a vertical stack of source/drain layer, channel layer, and source/drain layer with gate stacks on opposite sides, enabling higher integration density without the leakage penalties associated with horizontal scaling.
Solution Approach 2:
The channel layer is positioned in a specific local configuration between the source/drain layers in the vertical stack, with gate stacks on opposite sides controlling the channel. This localized structural arrangement optimizes current flow characteristics for each storage unit, suppressing leakage while maintaining on-current for high-capacity integration.
3Area of moving object
If the storage unit size is reduced, then the integration increases, but the leakage current increases
Solution Approach 1:
The patent reduces storage unit footprint area by utilizing the vertical dimension for the active region extension. The active region extends in the third direction inclined with respect to the first direction, allowing compact planar footprint while maintaining sufficient channel volume and controlling leakage through the vertical gate-controlled structure.
Solution Approach 2:
The inclination angle of the active region extension direction (third direction) with respect to the first direction is optimized to balance between area efficiency and leakage suppression. Additionally, the thickness and dimensions of the channel layer and source/drain layers are precisely controlled through epitaxial growth parameters to achieve optimal leakage current characteristics at reduced device dimensions.
4Power
If the channel layer orientation is optimized, then the on-current increases, but the manufacturing complexity increases
Solution Approach 1:
The orientation of the active region extension (third direction inclined with respect to the first direction) is optimized to enhance carrier mobility and on-current. The inclined angle and the dimensions of the channel layer are precisely controlled through epitaxial growth parameters, achieving high on-current while maintaining compatibility with standard semiconductor manufacturing processes.
Solution Approach 2:
The vertical stack structure including source/drain layer, channel layer, and source/drain layer is formed in advance through controlled epitaxial growth before subsequent processing steps. This preliminary formation of the optimized orientation structure simplifies later manufacturing steps compared to attempting to create the same structure through multiple lithography and etching operations.
Data Source
AI summary
A storage device is provided, including: a substrate; word lines extending in a first direction; bit lines extending in a second direction perpendicular to the first direction; and a storage unit including a plurality of storage units, each of which is electrically connected to a word line and a bit line. Each storage unit includes: an active region extending in a third direction inclined with the first direction; a vertical stack of a first source/drain layer, a channel layer and a second source/drain layer; and gate stacks between the first source/drain layer and the second source/drain layer, and on opposite sides of the channel layer in a fourth direction orthogonal to the third direction, to sandwich the channel layer. The word line corresponding to each storage unit extends across the storage unit in the first direction to be electrically connected to the gate stacks on opposite sides.