Vertical TFET Structure with Asymmetric Doping for Enhanced Tunneling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in forming reliable semiconductor devices at increasingly smaller sizes due to the complexity and difficulty of fabrication processes as feature sizes decrease, leading to issues with processing and manufacturing efficiency.
Innovation Solution
A semiconductor device structure is formed with a source structure, channel structure, and drain structure, where a corner is created between the channel and source structures and filled with a gate stack, enhancing the electric field and tunneling probability, and the process involves epitaxial growth and doping techniques to improve transistor performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes continue to decrease to increase functional density, then production efficiency increases and costs decrease, but fabrication process complexity and difficulty increase
Solution Approach 1:
The fabrication process is divided into multiple sequential steps including forming first and second trenches at different depths, selective epitaxial growth in specific regions, and staged doping processes. This segmentation allows each step to be optimized independently, managing overall process complexity while achieving small feature sizes.
Solution Approach 2:
Different regions of the semiconductor structure receive different treatments: the first trench receives a first doped semiconductor material while the second trench receives a second doped semiconductor material with different conductivity type. This local differentiation enables precise control of electrical properties at specific locations, facilitating miniaturization without sacrificing device performance.
2Productivity
If feature sizes decrease to increase functional density, then more devices fit per chip area, but manufacturing reliability decreases
Solution Approach 1:
The method performs preliminary actions by first forming the first trench and filling it with doped material before forming the second trench. This sequential approach ensures that each structure is properly established before subsequent processing, maintaining reliability even as features become smaller and more densely packed.
Solution Approach 2:
The first doped semiconductor material acts as an intermediary structure between the substrate and the second trench. This intermediate layer provides mechanical support and electrical isolation, enabling the formation of smaller features while maintaining manufacturing reliability through staged construction.
3Ease of manufacture
If conventional transistor structures are used, then fabrication is simpler, but tunneling current and device performance are limited
Solution Approach 1:
The transistor structure uses asymmetric doping with the first trench containing doped material of one conductivity type and the second trench containing doped material of opposite conductivity type. This asymmetry creates favorable band alignment that enhances tunneling current while remaining compatible with existing fabrication techniques.
Solution Approach 2:
The invention transitions from planar transistor structures to a vertical architecture with trenches at different depths. This dimensional change enables better control of the electric field and tunneling region, significantly improving device performance without requiring proportionally smaller feature sizes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly increases the tunneling current and reduces the sub-threshold swing of tunneling field-effect transistors (TFETs), enhancing device performance and efficiency.
Implementation Method 1
A semiconductor material is epitaxially grown in the first trench
Implementation Method 2
The epitaxially grown semiconductor material is doped with a dopant
Data Source
AI summary
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a source structure at least partially in a semiconductor substrate. The semiconductor device structure also includes a channel structure over the semiconductor substrate. The source structure is partially covered by the channel structure. The semiconductor device structure further includes a drain structure covering the channel structure. The drain structure and the source structure have different conductivity types. A portion of the channel structure is sandwiched between the source structure and the drain structure. In addition, the semiconductor device structure includes a gate stack partially covering the channel structure.