Vertical TFT Spacer Layout for High-Aperture Displays
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Solution Overview
Problem
High-resolution display devices face challenges in increasing aperture ratio due to the increasing area occupied by thin film transistors, which reduces the effective display area and increases manufacturing costs.
Innovation Solution
A display device with a vertical transistor structure, where the active pattern extends along the side surfaces of a spacer on the substrate, utilizing a metal oxide semiconductor with chemical resistance, and a method of manufacturing that reduces the number of masks needed by forming the source and drain electrodes simultaneously.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the resolution of display devices is increased, then the number of pixels increases, but the area occupied by thin film transistors relatively increases, causing the aperture ratio to decrease
Solution Approach 1:
The active pattern is configured to extend along the side surface of the spacer in the vertical direction, transforming the traditional planar transistor layout into a three-dimensional structure. This vertical extension allows the channel length to be determined by the spacer height rather than horizontal distance, enabling sufficient channel length while minimizing the horizontal area occupied by the transistor, thus maintaining high aperture ratio even at high resolutions
Solution Approach 2:
The active pattern is formed within the spatial region defined by the spacer structure, nesting the functional elements of the transistor (source, drain, channel) along the vertical profile of the spacer. This nesting approach allows the transistor to utilize the vertical space rather than consuming additional horizontal area, effectively increasing the aperture ratio while maintaining resolution requirements
2Ease of manufacture
If the number of masks is reduced by forming source and drain electrodes simultaneously, then manufacturing cost decreases, but process complexity increases
Solution Approach 1:
The source electrode and drain electrode are formed simultaneously in a single deposition and patterning step, merging two separate manufacturing processes into one. This consolidation reduces the total number of masks required and simplifies the manufacturing workflow, while the vertical transistor structure inherently provides clear spatial separation between source and drain regions, maintaining process control despite the merged steps
Data Source
AI summary
A display device includes: a substrate; a spacer on the substrate and including: an upper surface; a first side surface extending toward the substrate from a first end of the upper surface; and a second side surface extending toward the substrate from a second end of the upper surface; an active pattern on the first side surface of the spacer, including a metal oxide semiconductor, and having a source region and a drain region; a source electrode on the second side surface of the spacer and the active pattern, and connected to the source region; a drain electrode on the substrate, including a same material as the source electrode, and connected to the drain region; and a first gate electrode on the active pattern and partially overlapping the first side surface of the spacer.