Vertical Transfer Gate Layout for CMOS Image Sensor Lag Reduction
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Solution Overview
Problem
As semiconductor devices continue to reduce minimum feature sizes for higher integration density, challenges arise in capturing electrons efficiently in radiation sensing regions of CMOS image sensors, leading to issues like CIS lag.
Innovation Solution
Implementing a vertical transfer gate (VTG) all around design with multiple transfer gate walls that extend deeper into radiation sensing regions to enhance electron capture.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If minimum feature sizes are reduced to improve integration density, then more components can be integrated into a given area, but electron capture efficiency in radiation sensing regions deteriorates
Solution Approach 1:
The patent transitions from planar transfer gates to vertical transfer gate structures that extend into the substrate. The VTG structure includes a body portion and multiple wall sections that vertically extend into the radiation sensing region, utilizing the third dimension (depth) to enhance electron capture without reducing the lateral footprint of pixel elements, thereby maintaining integration density while improving electron capture efficiency.
Solution Approach 2:
The vertical transfer gate is segmented into multiple wall sections (e.g., first, second, third, and fourth wall sections) that extend into the substrate at different positions around the pixel section. This segmentation allows the transfer gate to capture electrons from multiple regions of the radiation sensing volume simultaneously, improving overall electron capture efficiency while maintaining a compact structure suitable for high-density integration.
2Reliability
If vertical transfer gate wall sections extend deeper into the substrate to improve electron capture, then electron capture efficiency improves, but device complexity increases
Solution Approach 1:
The patent combines multiple wall sections into a single integrated vertical transfer gate structure that shares common fabrication steps and materials. The wall sections are formed as part of the same gate structure using the same gate electrode material and insulation layers, reducing the need for separate processing steps and minimizing the increase in device complexity while achieving enhanced electron capture through the vertical extension into the substrate.
Data Source
AI summary
A semiconductor structure is provided that includes: a plurality of pixel sections arranged in a substrate, each pixel section having a plurality of sides; and first pixel section of the plurality of pixel sections including: a photo detector; and a vertical transfer gate (VTG) structure disposed above the photo detector, the VTG structure having a laterally extending body portion and a plurality of wall sections connected to end regions of the body portion that vertically extend into the substrate and laterally extend adjacent to a side of the pixel section.