Vertical Semiconductor Transistor Stack for Small-Area High Current
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving miniaturization, high on-state current, favorable electrical characteristics, low power consumption, and high productivity, particularly in transistors with small channel lengths for high-resolution display devices.
Innovation Solution
A semiconductor device structure comprising multiple conductive and insulating layers with specific hydrogen and oxygen content regions, where the insulating layers are designed to facilitate low resistance and appropriate carrier concentration distribution, and a method for manufacturing this device involving controlled film formation and plasma treatment to optimize transistor performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If transistor size is reduced to achieve high-resolution display, then display resolution is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent transitions from planar transistor architecture to a three-dimensional stacked structure with vertical channel formation. Multiple conductive layers and insulating layers are stacked vertically, allowing current flow in the vertical direction rather than only horizontally. This dimensional change enables miniaturization of the transistor footprint while maintaining channel length through vertical stacking, thereby achieving high display resolution without proportionally increasing manufacturing precision requirements in the planar direction.
Solution Approach 2:
The transistor structure is divided into multiple discrete layers including first conductive layer, second conductive layer, third conductive layer, and multiple insulating layers (first through sixth insulating layers). Each layer performs a specific function: conductive layers form source/drain regions and gate electrodes, while insulating layers provide electrical isolation and define channel regions. This segmentation allows independent optimization of each layer's thickness and composition, enabling precise control of electrical characteristics while maintaining compact overall dimensions.
2Length of moving object
If channel length is reduced to miniaturize transistor, then transistor size is reduced, but on-state current decreases
Solution Approach 1:
The patent implements vertical channel formation where current flows in the vertical direction through the semiconductor layer between stacked conductive layers. This three-dimensional channel configuration increases the effective channel cross-sectional area without increasing the planar footprint. The channel length is defined by the vertical distance between conductive layers, which can be precisely controlled through thin-film deposition techniques, thereby maintaining high on-state current despite reduced transistor area.
Solution Approach 2:
The patent employs multiple insulating layers with different compositions and properties: first and fifth insulating layers have higher hydrogen content for interface passivation, while third insulating layer contains oxygen for charge trapping. This composite insulating structure creates optimized electrical interfaces and fields that enhance carrier transport through the channel, maintaining high on-state current in the miniaturized vertical transistor structure.
3Loss of energy
If hydrogen content is increased in insulating layers to reduce resistance, then wiring resistance is reduced, but hot carrier generation increases
Solution Approach 1:
The patent applies different hydrogen content profiles to different insulating layers at different vertical positions. The first and fifth insulating layers (adjacent to source/drain regions) have higher hydrogen content to passivate interfaces and reduce contact resistance. The third insulating layer (adjacent to the channel region) contains oxygen to provide charge trapping and suppress hot carrier generation. This local differentiation of material properties allows simultaneous optimization of resistance and reliability.
Solution Approach 2:
The patent introduces oxygen-containing insulating layers as intermediaries between hydrogen-rich regions and the semiconductor channel. These oxygen-containing layers act as mediators that suppress the harmful effects of hydrogen (such as hot carrier generation and interface defects) while still allowing the beneficial low-resistance characteristics to be achieved through controlled hydrogen distribution in other regions.
4Reliability
If multiple insulating layers with different compositions are used to optimize electrical characteristics, then transistor reliability is improved, but device complexity increases
Solution Approach 1:
The patent designs the insulating layers to perform multiple functions simultaneously. For example, the first and fifth insulating layers with higher hydrogen content serve to passivate interfaces with the semiconductor layer, reduce contact resistance, and suppress defect formation. The third insulating layer with oxygen content provides charge trapping to suppress hot carrier effects and improves interface quality. By making each insulating layer multi-functional, the patent achieves high reliability without requiring an excessive number of layers, thereby managing device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables the creation of transistors with small channel lengths, high on-state current, and favorable electrical characteristics, reducing power consumption and enhancing productivity, thereby supporting the development of high-resolution display devices.
Implementation Method 1
the first insulating layer includes a region having a higher hydrogen content than the second insulating layer; the fifth insulating layer includes a region having a higher hydrogen content than the fourth insulating layer
Implementation Method 2
the third insulating layer contains oxygen
Data Source
AI summary
To provide a semiconductor device that occupies a small area. The semiconductor device includes a first conductive layer, first to fifth insulating layers, and a second conductive layer that are stacked in this order and further includes a semiconductor layer, a third conductive layer, and a sixth insulating layer. The semiconductor layer is in contact with the top surface of the first conductive layer, the side surfaces of the first to fifth insulating layers, and the second conductive layer. The sixth insulating layer is over the semiconductor layer. The third conductive layer is over the sixth insulating layer and overlaps with the semiconductor layer with the sixth insulating layer between the third conductive layer and the semiconductor layer. The first insulating layer includes a region having a higher hydrogen content than the second insulating layer. The fifth insulating layer includes a region having a higher hydrogen content than the fourth insulating layer. The third insulating layer contains oxygen.