Vertically Integrated Inductor in Semiconductor Package

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Solution Overview

Problem

Conventional power converter implementations on printed circuit boards require significant area due to the need for a separate output inductor, which is often a large discrete component, making the layout inefficient in terms of space.

Innovation Solution

A semiconductor package is developed with a flip chip mounted integrated circuit (IC) and a vertically integrated inductor, where the inductor is integrated into the package itself, reducing the need for external space by using patterned conductive carriers and magnetic material to form windings around a magnetic core.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a separate discrete output inductor is used in combination with the semiconductor package, then the power converter can be implemented with conventional components, but the required PCB surface area increases significantly

Engineering Contradiction:
Improveconventional component implementationVSAvoidPCB surface area
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent merges the semiconductor package and the output inductor into a single integrated unit. The inductor is constructed using conductive carriers and magnetic material that are vertically stacked and electrically connected to the semiconductor package, eliminating the need for a separate discrete inductor component on the PCB.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from a planar side-by-side layout to a vertical three-dimensional configuration. The inductor is positioned vertically above the semiconductor package, utilizing the vertical dimension to reduce the horizontal PCB footprint area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If a large discrete output inductor is used, then the power converter can achieve required inductance values, but the layout efficiency and space utilization deteriorate

Engineering Contradiction:
Improveinductance performanceVSAvoidlayout efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent nests the inductor structure within the semiconductor package footprint. The conductive carriers and magnetic material are arranged in a compact nested configuration where the inductor windings are formed by patterned conductive carriers positioned vertically above the package, effectively nesting the inductor within the same horizontal footprint as the semiconductor package.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent uses composite construction combining patterned conductive carriers (such as copper or aluminum layers) with magnetic material (such as ferrite or iron powder core material) to form the inductor. This composite structure achieves the required inductance values in a compact vertical arrangement, maintaining electrical performance while improving layout efficiency.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design significantly reduces the required printed circuit board surface area by integrating the inductor within the semiconductor package, enabling a more compact and efficient power converter solution.

Implementation Method 1

patterned conductive carriers and magnetic material to form windings around a magnetic core

Methodology Applied
Scientific EffectElectromagnetic induction: Electromagnetic Induction

Data Source

PatentUS10332825B2Semiconductor package including flip chip mounted IC and vertically integrated inductor
Publication Date: 2019.06.25 INFINEON TECHNOLOGIES AMERICAS CORP
  • US10332825B2 patent drawing
  • US10332825B2 patent drawing
  • US10332825B2 patent drawing

AI summary

In one implementation, a semiconductor package includes an integrated circuit (IC) flip chip mounted on a first patterned conductive carrier, a second patterned conductive carrier situated over the IC, and a magnetic material situated over the second patterned conductive carrier. The semiconductor package also includes a third patterned conductive carrier situated over the magnetic material. The second patterned conductive carrier and the third patterned conductive carrier are electrically coupled so as to form windings of an integrated inductor in the semiconductor package.