Vertically Spaced Electrode Structure for Vertical TFTs
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Solution Overview
Problem
Current semiconductor manufacturing processes for vertical thin film transistors (TFTs) face challenges in achieving small feature sizes, high drive current, and low voltage operation due to limitations in photolithographic resolution and complexity in processing vertical structures, particularly in combining selective area deposition (SAD) steps to form functional devices with controlled critical interfaces.
Innovation Solution
A vertically separated electrode structure is developed, featuring a polymeric material post with an inorganic cap and conformal dielectric and semiconductor layers, allowing for the formation of short channel vertical TFTs using selective area deposition and atomic layer deposition (ALD) processes without the need for high-resolution alignments, enabling flexible substrate use and reduced series resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional photolithographic patterning methods are used, then feature size can be controlled, but manufacturing cost increases and processing complexity increases
Solution Approach 1:
The patent transitions from planar photolithographic patterning to vertical structure formation using spin-coating and thermal curing. The channel length is defined by the thickness of the polymer layer in the vertical dimension rather than by lateral photolithographic patterns, enabling short channel lengths without requiring high-resolution lithography tools.
Solution Approach 2:
The invention changes the controlling parameter for channel length from lateral dimensions (controlled by photolithography) to vertical thickness (controlled by spin-coating parameters and thermal curing). This parameter transformation allows precise control of channel length through simpler, lower-cost processes.
2Power
If channel length is reduced to improve TFT performance, then drive current increases, but manufacturing precision requirements increase due to photolithography limitations
Solution Approach 1:
The patent defines channel length through the vertical thickness of the polymer layer using spin-coating, bypassing photolithography resolution limits. This enables precise control of short channel lengths (e.g., 100 nm scale) that would be difficult to achieve with conventional lithographic methods.
Solution Approach 2:
The invention replaces the mechanical photolithographic patterning system with a solution-based spin-coating and thermal curing process. The polymer layer thickness, and thus channel length, is controlled by rotational speed and curing conditions rather than by photomask patterns.
3Shape
If complex semiconductor processes are used for vertical wall patterning, then vertical structures can be formed, but device complexity increases
Solution Approach 1:
The patent extracts the vertical structure formation from complex multi-step semiconductor processes. By using spin-coating to deposit a polymer layer that is then thermally cured to form vertical walls, the invention eliminates the need for temporary fillers, multiple etching steps, and alignment procedures required by conventional methods.
Solution Approach 2:
The invention changes the approach to vertical wall formation from mechanical deposition and etching to solution-based coating and thermal curing. The polymer's glass transition temperature enables controlled softening and flow to form vertical profiles during curing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the production of TFTs with shorter channel lengths and higher drive current capabilities while simplifying the manufacturing process, reducing costs, and allowing for flexible substrate use, thus overcoming the limitations of traditional methods.
Implementation Method 1
An inorganic material cap is on the top of the post, the cap covering the top of the post in the length dimension and the width dimension of the post
Implementation Method 2
allowing for the formation of short channel vertical TFTs using selective area deposition and atomic layer deposition (ALD) processes
Implementation Method 3
allowing for the formation of short channel vertical TFTs using selective area deposition and atomic layer deposition (ALD) processes
Data Source
AI summary
A vertically separated electrode structure includes a polymeric material post on a substrate. An inorganic material cap covers the top of the post and extends beyond an edge of the post in at least a width dimension to define a first reentrant profile. A first electrode is located over the cap. A second electrode is located over the substrate and not over the post. The second electrode is adjacent to the edge of the post in the reentrant profile such that a distance between the first electrode and second electrode is greater than zero when measured orthogonally to the substrate surface. The first electrode and second electrode have the same material composition and layer thickness.