Printed Wiring Board Via Conductor Stress Reduction
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Solution Overview
Problem
Existing printed wiring boards face issues with stress concentration and crack formation in penetrating conductors due to uneven inner wall surfaces of via holes, leading to reliability concerns and potential malfunctions.
Innovation Solution
The use of resin insulating layers with inorganic particles, where the inner wall surfaces of via holes are formed by a combination of smooth first inorganic particles and embedded second inorganic particles, creating a smooth surface for seed layer formation and improving the filling property of electrolytic plating layers, thereby reducing stress concentration and crack occurrence in via conductors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If via holes are formed in conventional resin insulating layers, then electrical connection between conductor layers is achieved, but stress concentration and crack formation occur due to uneven inner wall surfaces
Solution Approach 1:
The patent changes the physical parameters of the insulating layer by incorporating inorganic particles with controlled size distribution (first particles: 0.1-10 μm, second particles: 10-100 μm). This parameter modification creates a self-leveling effect during via hole formation, producing smooth inner wall surfaces that eliminate stress concentration points and prevent crack formation in via conductors.
Solution Approach 2:
The patent uses a composite insulating layer material consisting of resin base material combined with two types of inorganic particles having different size ranges. This composite structure enables the insulating layer to simultaneously provide mechanical support, electrical insulation, and surface smoothing functions, resolving the contradiction between via conductor reliability and inner wall surface uniformity.
2Manufacturing precision
If electrolytic plating is performed on rough inner wall surfaces, then via conductors are formed, but poor filling properties and void formation occur
Solution Approach 1:
By modifying the surface parameter of the via hole inner wall through the addition of fine inorganic particles (0.1-10 μm), the patent creates a uniformly smooth surface that enhances electrolytic plating filling properties. This parameter change ensures complete void-free filling of via conductors while maintaining manufacturing precision.
3Reliability
If conventional resin insulating layers are used, then manufacturing simplicity is maintained, but signal propagation speed varies and noise increases due to surface unevenness
Solution Approach 1:
The patent employs a composite insulating layer with dual-size inorganic particles that simultaneously achieves signal propagation consistency and noise reduction. The fine particles (0.1-10 μm) create smooth via hole surfaces for reliable electrical connection, while the coarser particles (10-100 μm) provide structural stability, together eliminating signal variation without excessive complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of printed wiring boards by suppressing crack formation and voids between the inner wall surfaces and via conductors, ensuring a high-quality board with consistent signal propagation speed and reduced noise.
Implementation Method 1
via conductors formed in via holes of the resin insulating layers and each including a seed layer and an electrolytic plating layer formed on the seed layer
Data Source
AI summary
A printed wiring board includes a laminate including resin insulating layers and conductor layers, and via conductors formed in via holes of the resin insulating layers and each including a seed layer and an electrolytic plating layer formed on the seed layer such that the via conductors connect the conductor layers adjacent to each other and that the via conductors include a first via conductor and a second via conductor formed on the first via conductor in a lamination direction of the laminate. The resin insulating layers include resin and inorganic particles such that the inorganic particles include first inorganic particles having smooth surfaces and second inorganic particles embedded in the resin insulating layers and that an inner wall surface of each of the via holes in the resin insulating layers includes the resin and the smooth surfaces of the first inorganic particles.