Via Contact Stacking for High-Aspect-Ratio Semiconductor Vias
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Solution Overview
Problem
The increasing aspect ratio of vias in semiconductor devices due to downsizing leads to defects such as voids, seams, or grooves during via contact formation.
Innovation Solution
A method involving the formation of a first via contact feature, etching it back, and subsequently forming a second via contact feature on it, while using gas plasma etching and argon sputter cleaning to minimize defects, and optionally incorporating a glue layer for enhanced adhesion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If via size is reduced to enable device scaling, then device density and integration are improved, but aspect ratio increases causing formation of defects (voids, seams, grooves) in via contact
Solution Approach 1:
The via contact formation process is divided into multiple sequential steps: forming a first contact layer, depositing a first cap layer, forming a second contact layer, and depositing a second cap layer. This segmentation allows each layer to be optimized independently and prevents defect formation that would occur in a single-step process
Solution Approach 2:
The first via contact feature is formed and etched back before forming the second via contact feature. This preliminary action creates a prepared surface and removes potential defects from the first contact layer, ensuring a clean base for the second contact layer and reducing overall defect formation
2Device complexity
If conventional single-layer via contact formation is used, then process simplicity is maintained, but defects such as voids and seams form due to high aspect ratio
Solution Approach 1:
The contact formation process is segmented into multiple layers (first contact layer with first cap layer, second contact layer with second cap layer) rather than using a single layer. This segmentation improves reliability by distributing stress and reducing defect formation, while the systematic multi-step process maintains manufacturability
Solution Approach 2:
The process parameters are changed by introducing intermediate cap layers between contact layers. The cap layers have different material properties and deposition parameters than the contact layers, allowing optimization of each layer's properties to prevent defect formation while maintaining overall process control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces defects in via contacts, ensuring reliable electrical connections and device performance.
Implementation Method 1
etching it back, and subsequently forming a second via contact feature on it, while using gas plasma etching
Implementation Method 2
argon sputter cleaning to minimize defects
Data Source
AI summary
A method for manufacturing a semiconductor device includes forming a conductive feature in a first dielectric layer; forming a second dielectric layer on the first dielectric layer; forming a trench that penetrates through the second dielectric layer, and terminates at the conductive feature; forming a contact layer in the trench and on the conductive feature; etching back the contact layer to form a first via contact feature in the trench, the first via contact feature being electrically connected to the conductive feature; and forming a second via contact feature on the first via contact feature in the trench.