Through Via Structure with Segmented CVD and Electroplating Fill
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Solution Overview
Problem
Existing three-dimensional integrated circuit technologies face challenges in achieving uniform distribution of conductive materials in high aspect ratio through vias, leading to poor electrical characteristics due to non-uniform copper plating, which affects the reliability and performance of semiconductor devices.
Innovation Solution
The process involves forming a substrate with a hard mask layer, creating a trench with a narrower lower portion and a wider upper portion, depositing a barrier layer and seed layer, and filling the trench with copper using a combination of chemical vapor deposition (CVD) and electroplating, followed by planarization to reduce the aspect ratio and ensure uniform copper distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional electroplating is used to fill high aspect ratio through vias, then the plating process is simple and fast, but the copper distribution becomes non-uniform leading to poor electrical characteristics
Solution Approach 1:
The through via filling process is segmented into two distinct stages: first CVD tungsten deposition to establish a base layer and reduce aspect ratio, then electroplating to complete the conductive fill. This segmentation allows each process to optimize for its specific function, achieving uniform copper distribution while maintaining process efficiency.
Solution Approach 2:
The CVD tungsten deposition is performed as a preliminary action before electroplating. This preliminary step reduces the effective aspect ratio of the via and provides a uniform base layer, which enables subsequent electroplating to achieve uniform copper distribution throughout the via structure.
2Length of moving object
If the aspect ratio of through vias is high, then vertical connection capability is improved, but copper plating uniformity deteriorates
Solution Approach 1:
CVD tungsten deposition is performed as a preliminary action that reduces the effective aspect ratio of the via before copper electroplating. This preliminary reduction in aspect ratio enables uniform copper plating even in originally high aspect ratio structures, allowing deep vias to maintain both vertical connection capability and plating uniformity.
Solution Approach 2:
The aspect ratio parameter is dynamically changed during the filling process. The CVD tungsten deposition reduces the via depth effectively, transforming the high aspect ratio structure into a lower aspect ratio structure that is amenable to uniform electroplating, thus achieving both deep via penetration and uniform copper distribution.
3Length of moving object
If through vias are made deeper for better vertical connection, then connection capability is improved, but manufacturing complexity increases
Solution Approach 1:
The fabrication process is segmented into specialized steps: deep via formation with CVD tungsten deposition for the depth portion, followed by electroplating for the conductive fill. This segmentation makes deep via fabrication manageable by assigning each step a specific function, reducing overall manufacturing complexity despite the increased via depth.
Solution Approach 2:
The manufacturing approach changes parameters dynamically: CVD tungsten deposition parameters are optimized for deep film formation, then electroplating parameters are optimized for uniform copper fill. This parameter optimization at each stage simplifies the overall manufacturing of deep through vias by treating each phase with appropriate process conditions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and electrical quality of through vias by achieving uniform copper distribution, improving the aspect ratio and plating process, thereby increasing the performance and efficiency of semiconductor devices.
Implementation Method 1
depositing a barrier layer and seed layer
Implementation Method 2
filling the trench with copper using a combination of chemical vapor deposition (CVD) and electroplating
Implementation Method 3
The thinning process is applied to the backside of the substrate until the conductive material of the through via is exposed
Data Source
AI summary
A device comprises a via in a substrate comprising a lower via portion with a first width formed of a first conductive material and an upper via portion with a second width greater than the first width, wherein the upper via portion comprises a protection layer formed of the first conductive material and a via fill material portion formed of a second conductive material.


