Via Fabrication Using Chemical Etching for High-Density Interconnects
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Solution Overview
Problem
Current drill & fill technology for creating vias in IC substrates and interposers is limited by high costs, difficulty in achieving high density and varied via sizes, rough side walls, tapering, and reliability issues, which hinder the miniaturization and electrical performance of electronic components.
Innovation Solution
The use of pattern plating and panel plating technologies to deposit copper or other metals into photo-resist patterns, followed by lamination with a dielectric material, allows for the creation of high-density, varied via geometries and shapes, enabling thinner, more reliable interconnects and chip packaging solutions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If laser drilling is used to create vias in dielectric material, then via channels can be drilled through the substrate, but the side walls become rough and the via channels taper inwards, reducing manufacturing precision and reliability
Solution Approach 1:
The patent replaces the mechanical laser drilling process with a chemical etching process. Instead of using a laser to physically remove material and create via channels, the invention uses chemical etchants to selectively remove dielectric material, resulting in smooth, non-tapering via channels with precise geometry that maintain both manufacturing precision and electrical contact reliability.
Solution Approach 2:
The patent changes the fundamental parameter of the via creation process from thermal/mechanical (laser) to chemical (etching). This parameter change transforms the outcome from rough, tapered channels to smooth, vertically-walled channels, fundamentally resolving the contradiction between precision and reliability.
2Quantity of substance
If drill & fill methodology is used to create high density vias, then multiple vias can be produced in close proximity, but the throughput rate is limited and fabrication costs become prohibitive
Solution Approach 1:
The patent merges multiple via creation operations into a single chemical etching process. Instead of drilling each via individually through the dielectric layer, the invention applies chemical etchants that can simultaneously etch multiple via channels across the entire substrate, dramatically increasing throughput while maintaining high via density.
Solution Approach 2:
The patent substitutes the slow, sequential mechanical laser drilling process with a parallel chemical etching process. Chemical etching can process entire substrates simultaneously, creating high-density via arrays at much higher throughput rates and lower costs compared to individual laser drilling operations.
3Adaptability or versatility
If different sized via channels are drilled and filled with metal, then various via geometries can be created, but the via channels fill up at different rates causing dimpling or overfill
Solution Approach 1:
The patent applies preliminary chemical etching to create all via channels with uniform, vertically-walled geometries before the metal filling process. This preliminary action ensures that all via channels have identical etching characteristics and uniform cross-sections, which guarantees uniform metal filling rates and eliminates dimpling or overfill issues that occur when filling differently shaped channels.
4Quantity of substance
If laser drilling is used in composite dielectric materials, then via channels can be created, but the ablation process results in rough side walls and significant tapering, limiting via diameter to minimum sizes
Solution Approach 1:
The patent replaces the laser ablation process with chemical etching specifically tailored for composite dielectric materials. Chemical etching selectively removes material through chemical reactions rather than thermal ablation, producing smooth, non-tapering side walls even at minimum via diameters, thereby eliminating the limitations imposed by laser drilling on small features.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of high-density interconnects with smaller via diameters and diverse geometries, improving reliability and miniaturization, while reducing costs and manufacturing complexity, thus supporting the development of more advanced electronic components.
Implementation Method 1
pressing sheets of the dielectric material over a sacrificial array of metal stubs under heat and pressure
Implementation Method 2
deposit copper or other metals into photo-resist patterns
Data Source
AI summary
An array of chip sockets defined by an organic matrix framework surrounding sockets through the organic matrix framework and a method of fabrication, the chip sockets are characterized by being rectangular with smooth walls that meet at corners that have radii of curvature of less than 100 microns thereby facilitating a close fit of each socket to the intended chip size, enabling compact chip packaging and miniaturization.