Multilayer Wiring Substrate Via Hole Plating
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Solution Overview
Problem
In manufacturing multilayer wiring boards, conventional electrolytic copper plating methods result in thick plating layers on the surface metal foil and often lead to plating voids within via holes due to overhangs caused by laser processing, which complicates fine wiring and equipment usage.
Innovation Solution
A method involving the lamination of inner layer materials with insulating layers and metal foils, forming base electroless plating layers, and using electrolytic filling plating with varying electric current densities to prevent overhang blockage and ensure even plating within via holes, allowing for the formation of non-filled via holes without voids.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional general electrolytic copper plating is used, then connection reliability is improved by forming thick plating layers, but fine wiring properties deteriorate due to excessive thickness on surface metal foil
Solution Approach 1:
The invention applies different plating thicknesses to different locations: thick plating inside via holes for reliability, thin plating on surface metal foil for fine wiring. This is achieved through electrolytic filling plating that preferentially deposits metal in the via hole region while minimizing deposition on the surface.
Solution Approach 2:
The invention changes plating parameters (current density, plating time, electrolyte composition) to control the plating process. By optimizing these parameters, the plating thickness is controlled to be thin on the surface (maintaining fine wiring properties) while ensuring adequate thickness inside via holes (ensuring connection reliability).
2Manufacturing precision
If electrolytic filling plating is used to decrease plating thickness on surface metal foil, then fine wiring properties are improved, but plating voids occur within via holes due to overhang blockage
Solution Approach 1:
The invention performs preliminary electroless plating to form a base layer that covers the overhang region before electrolytic filling plating. This base layer provides a foundation that prevents plating voids while allowing the subsequent electrolytic plating to achieve the desired thin thickness on the surface.
Solution Approach 2:
The invention uses periodic or controlled current density application during electrolytic filling plating. By controlling the plating process in stages or with varying current densities, the plating uniformly fills the via hole without being blocked by overhangs, while maintaining thin thickness on the surface.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents thick plating on the surface metal foil and reduces plating voids within via holes, enabling efficient production of multilayer wiring boards with improved fine wiring properties and equipment efficiency.
Implementation Method 1
filling in the hole for a via hole with an electrolytic plating layer formed by using an electrolytic filling plating solution
Implementation Method 2
forming a base electroless plating layer within the hole for a via hole and on the metal foil for an upper layer wiring pattern
Data Source
AI summary
The present invention is a method for manufacturing a multilayer wiring board having (1) a step of providing with a hole for a via hole from a metal foil for an upper layer wiring pattern to an inner layer wiring pattern by using a conformal method or a direct laser method, and (2) a step of forming a via hole by forming electrolytic filling plating layers in the hole for a via hole, wherein the formation of the electrolytic filling plating layers in the step (2) is carried out by repeating change in electric current density of temporarily decreasing the electric current density of electrolytic filling plating in the middle of the electrolytic filling plating and then increasing it again, two or more times before the electrolytic filling plating layers block an opening of the hole for a via hole.