Selective Via Plating Using Light Guide Masking
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Solution Overview
Problem
Current multi-layer printed circuit boards face signal degradation due to stubs in metal-coated vias, which are undesired extensions of the coated via beyond the intended signal layer, affecting circuit board performance.
Innovation Solution
A process using a light guide to selectively expose and remove photoresist layers within vias, allowing for precise metal plating only where intended, thereby reducing or eliminating stubs by controlling light exposure through a masked light guide inserted into the via.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal coating is applied to the entire via, then electrical connectivity is ensured, but stubs are formed causing signal degradation
Solution Approach 1:
The patent applies photoresist selectively to specific regions of the via interior surface, creating different properties in different areas. The masked regions receive photoresist coating while unmasked regions remain exposed, enabling selective metal plating only where needed to connect signal layers without creating stubs in non-conductive regions
2Manufacturing precision
If photoresist is applied to the entire via interior surface, then complete coverage is achieved, but selective plating cannot be accomplished
Solution Approach 1:
The patent introduces a mask as an intermediary tool that selectively blocks photoresist application to specific via regions. This mask allows precise control over which areas receive photoresist coating, enabling the formation of conductive paths only in desired locations while keeping the process relatively simple
Solution Approach 2:
The via interior surface is divided into masked and unmasked regions, with photoresist applied only to specific segments. This segmentation allows different portions of the via to have different properties - some areas become conductive through metal plating while others remain insulating
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces stub formation, improving signal integrity by ensuring metal coating only covers the intended portions of the via, thus enhancing the performance of multi-layer printed circuit boards.
Implementation Method 1
exposing, by the light guide, a portion of the photoresist layer to light, thereby resulting in an exposed portion of the photoresist layer and an unexposed portion of the photoresist layer
Data Source
AI summary
The present invention provides a process and a structure of forming conductive vias using a light guide. In an exemplary embodiment, the process includes providing a via in a base material in a direction perpendicular to a plane of the base material, applying a photoresist layer to an interior surface of the via, inserting a light guide into the via, exposing, by the light guide, a portion of the photoresist layer to light, thereby resulting in an exposed portion of the photoresist layer and an unexposed portion of the photoresist layer, removing a portion of the photoresist layer, and plating an area of the via, where the photoresist has been removed, with a metal, thereby resulting in a portion of the via plated with metal and a portion of the via not plated with metal.