Through-substrate via and redistribution layer metal paste integration
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Solution Overview
Problem
Current semiconductor devices in stacked configurations face suboptimal electrical performance due to parasitic resistances and capacitances from interfaces between through-substrate vias and redistribution layers, and the manufacturing methods are costly and complex.
Innovation Solution
A semiconductor device and manufacturing method where the through-substrate via and redistribution conductor are formed as a single piece using metal paste, eliminating the physical interface and reducing parasitic resistance, and the process integrates the formation of these components in a single step, reducing costs and complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through-substrate vias and redistribution layers are manufactured as separate components with interfaces, then the manufacturing process can be performed using conventional multi-step methods, but parasitic resistances and capacitances degrade electrical performance
Solution Approach 1:
The patent merges the through-substrate via and redistribution layer into a single integrated structure formed by one continuous metal paste fill operation. The metal paste simultaneously forms both the via extending through the substrate and the redistribution layer on the surface, eliminating the physical interface between these two components. This integration directly reduces parasitic resistances and capacitances at the interface, improving electrical performance while simplifying the device structure.
2Ease of manufacture
If conventional multi-step manufacturing methods are used to form through-substrate vias and redistribution layers separately, then process control is easier, but manufacturing costs increase and productivity decreases
Solution Approach 1:
The patent combines multiple manufacturing steps into a single operation by using metal paste printing to simultaneously form both the through-substrate via and the redistribution layer in one fill process. This eliminates intermediate steps such as separate via filling, planarization, and redistribution layer deposition, thereby reducing manufacturing complexity and improving productivity despite the integrated approach.
Solution Approach 2:
The patent changes the material parameter from traditional electroplated metal to metal paste, which enables direct printing and filling of both via and redistribution layer structures. This material parameter change allows for a single-step formation process that maintains adequate process control while dramatically simplifying the manufacturing workflow and reducing costs.
3Device complexity
If metal paste is used to form both through-substrate vias and redistribution layers in a single step, then manufacturing costs decrease and process complexity is reduced, but the integration of functions requires new manufacturing techniques
Solution Approach 1:
The patent changes the manufacturing technique parameter from conventional electroplating to metal paste printing, which enables the simultaneous formation of through-substrate vias and redistribution layers. This parameter change introduces a new manufacturing capability that simplifies the overall process by allowing direct printing and single-step filling, reducing process complexity despite requiring adoption of new techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances electrical performance by minimizing interface-related parasitic effects and lowers manufacturing costs by simplifying the process, making it more efficient and cost-effective.
Implementation Method 1
The through-substrate via comprises a conductive paste, such as (vacuum printed) copper paste; silver paste, etc.
Data Source
AI summary
The invention relates to a semiconductor device for use in a stacked configuration of the semiconductor device and a further semiconductor device. The semiconductor device comprises: a substrate (5) comprising at least part of an electronic circuit (7) provided at a first side thereof. The substrate (5) comprises a passivation layer (19) at the first side and a substrate via that extends from the first side to a via depth beyond a depth of the electronic circuit (7) such that it is reconfigurable into a through-substrate via (10) by backside thinning of the substrate (5). The semiconductor device further comprises: a patterned masking layer (15) on the first side of the substrate (5). The patterned masking layer (15) comprises at least a trench (16) extending fully through the patterned masking layer (15). The trench has been filled with a redistribution conductor (20). The substrate via and the redistribution conductor (20) comprise metal paste (MP) and together form one piece. The effect of the features of the semiconductor device of the inventionis that there is no physical interface between those the through-substrate via (10) and the redistribution conductor (20). As a consequence of the invention the parasitic resistance of this electrical connection is reduced, which results in a better electrical performance of the semiconductor device. The invention further relates to a method of manufacturing such semiconductor device. And the invention relates to a semiconductor assembly comprising a stacked configuration of a plurality of such semiconductor devices.