Vibration Device Layout to Reduce Capacitive Coupling Noise
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Solution Overview
Problem
Capacitive coupling between the through hole and external connection terminal in vibration devices causes degradation in oscillation frequency accuracy and increases noise components in the oscillation signal.
Innovation Solution
The through electrode and external connection terminal are arranged to not overlap in a plan view perpendicular to the semiconductor substrate, with an insulating layer separating them, and an oscillation circuit and output buffer circuit are positioned to generate and output a clock signal via the external connection terminal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the through hole and external connection terminal are arranged to overlap in plan view, then the device complexity is reduced and manufacturing is simplified, but capacitive coupling occurs causing degradation in oscillation frequency accuracy and increased noise components
Solution Approach 1:
The patent resolves the contradiction by transitioning from a two-dimensional planar arrangement to a three-dimensional spatial arrangement. The through electrode and external connection terminal are positioned at different heights (vertical dimension) rather than overlapping in the plan view, eliminating capacitive coupling while maintaining manufacturing simplicity. This dimensional change allows both components to coexist without electrical interference.
2Object-affected harmful factors
If the through hole and external connection terminal are arranged to overlap, then the wiring space is optimized, but noise components in the oscillation signal increase due to capacitive coupling
Solution Approach 1:
The patent introduces an insulating layer as an intermediary between the through electrode and external connection terminal. This intermediate layer physically separates the two conductive elements, preventing direct capacitive coupling and reducing noise components in the oscillation signal while still allowing compact wiring space utilization.
3Reliability
If the through electrode and external connection terminal are separated to reduce capacitive coupling, then oscillation frequency accuracy improves, but the device layout becomes more complex
Solution Approach 1:
The patent achieves reliable separation of the through electrode and external connection terminal by utilizing the vertical dimension through different height positions and an insulating layer, rather than requiring complex lateral routing. This approach maintains manufacturing ease by following standard multi-layer PCB or semiconductor packaging techniques while ensuring oscillation signal stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This arrangement reduces capacitive coupling, improving oscillation frequency accuracy and reducing noise components in the oscillation signal, enhancing the performance of vibration devices.
Implementation Method 1
capacitive coupling between the through hole, which serves as a wiring line that electrically couples an oscillation circuit provided in the integrated circuit to the vibrator, and the external connection terminal for outputting a clock signal based on an oscillation signal causes problems
Data Source
AI summary
A vibration device includes a base including a semiconductor substrate and a through electrode passing through the portion between a first surface and a second surface of the semiconductor substrate, a vibrator placed at the side facing the first surface, and an external connection terminal provided at the side facing the second surface via an insulating layer. An oscillation circuit that is electrically coupled to the vibrator via the through electrode and generates an oscillation signal by causing the vibrator to oscillate, and an output buffer circuit that outputs a clock signal based on the oscillation signal are placed at the second surface. The clock signal from the output buffer circuit is outputted via the external connection terminal. The through electrode and the external connection terminal are arranged so as not to overlap with each other in a plan view viewed in the direction perpendicular to the first surface.