Virtual Fabric Configuration for Faster High-Level FPGA Compilation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current programmable logic devices require lengthy compilation times when configured using high-level languages, making it impractical for rapid design changes during development, especially with the need for pre-defined functions and complex circuitry in modern devices.
Innovation Solution
Precompiling high-level language representations of 'virtual fabrics' which are coarse-grained, interconnect networks with routing switches and function blocks, allowing for faster configuration by selecting from a library of precompiled virtual fabrics that match the user's logic design needs, and executing them using embedded or external processors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If high-level language compilation is performed for programmable device configuration, then ease of operation is improved, but compilation time becomes excessively long
Solution Approach 1:
The patent precompiles high-level language representations of virtual fabrics and stores them in a library before actual device configuration is needed. When configuration is required, the system selects and loads precompiled virtual fabrics rather than compiling from scratch, dramatically reducing compilation time while maintaining ease of operation through high-level language interfaces.
2Adaptability or versatility
If detailed logic design is implemented using high-level language, then adaptability is improved, but compilation complexity increases
Solution Approach 1:
The patent segments the configuration process into two parts: selecting precompiled virtual fabrics from a library (handling complexity) and customizing/combining them to meet specific design requirements (maintaining adaptability). This segmentation reduces compilation complexity while preserving the ability to create detailed and adaptable logic designs through virtual fabric selection and configuration.
Data Source
AI summary
A method of preparing a programmable integrated circuit device for configuration using a high-level language includes compiling a plurality of virtual programmable devices from descriptions in said high-level language. That compiling includes compiling configurations of configurable routing resources from programmable resources of said programmable integrated circuit device, and compiling configurations of a plurality of complex function blocks from programmable resources of said programmable integrated circuit device. A machine-readable data storage medium may be encoded with a library of such compiled configurations. A virtual programmable device may include a stall signal network and routing switches of the virtual programmable device may include stall signal inputs and outputs.