Virtual Interval Timer Counter for VM Migration Time Sync

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Solution Overview

Problem

Virtual machines experience time disruptions during migration due to inconsistencies in time sources between original and target physical machines, leading to software errors and aborts, especially when wall-clock time is frozen and then replayed too quickly, causing timeouts and incorrect execution.

Innovation Solution

A real-time clock virtualization system that creates a virtual ITC value using a scaling factor and offset to adjust wall-clock time progressively, minimizing disruptions and allowing synchronization with the target ITC, while avoiding timeouts and enabling de-virtualization of the real-time clock.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If wall-clock time is frozen during virtual machine migration and then replayed quickly to minimize migration time, then migration speed is improved, but time consistency deteriorates causing software errors and timeouts

Engineering Contradiction:
Improvemigration speedVSAvoidtime consistency
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces a virtual ITC counter as an intermediary between the physical ITC and the guest operating system. This virtual counter acts as a buffer that decouples the guest from direct observation of time disruptions during migration, allowing the physical time to be frozen and replayed while the virtual time provides a smooth, continuous timeline that prevents software errors and timeouts.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies preliminary action by pre-adjusting the virtual ITC counter value before the migration occurs. The system calculates the expected time disruption and proactively modifies the virtual counter to compensate for the upcoming freeze period, ensuring that when the migration completes and time is replayed, the guest operating system experiences a smooth time progression without disruptions.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If a virtual ITC counter is introduced to mask time disruptions, then time consistency is improved, but system complexity increases

Engineering Contradiction:
Improvetime consistencyVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent creates a copy of the ITC counter functionality in the form of a virtual ITC counter. This virtual copy mirrors the behavior of the physical ITC but allows for independent manipulation and adjustment. By copying the counter mechanism rather than fundamentally changing the timekeeping architecture, the system adds minimal complexity while effectively masking time disruptions during migration.

Inventive Principle:
Principle #26Copying

3Measurement precision

If the virtual ITC counter value is adjusted gradually to synchronize with target ITC, then time synchronization is improved, but migration time increases

Engineering Contradiction:
Improvetime synchronizationVSAvoidmigration time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements dynamic adjustment of the virtual ITC counter value during the migration process. Rather than using a fixed adjustment strategy, the system continuously monitors the time difference between source and target physical ITC counters and dynamically modifies the virtual counter to converge toward the target value. This dynamic approach achieves precise synchronization while minimizing the overall migration time by adapting to actual time discrepancies in real-time.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8694819B2System and method for gradually adjusting a virtual interval timer counter value to compensate the divergence of a physical interval timer counter value and the virtual interval timer counter value
Publication Date: 2014.04.08 HEWLETT PACKARD ENTERPRISE DEV LP
  • US8694819B2 patent drawing
  • US8694819B2 patent drawing
  • US8694819B2 patent drawing

AI summary

A system and corresponding method virtualizes a real-time clock in the presence of a time-disrupting event. The real-time clock is used with physical machines and includes a single time source within each of the physical machines. The system is implemented in one or more programmable devices, which may be hardware and/or software devices, or a combination of hardware and software devices. The physical machines include one or more virtual machines. The system includes an offset module that determines a time difference offset between a virtual interrupt timer counter (ITCV) associated with a virtual machine and a physical interrupt timer counter (ITCP) associated with a physical machine. The system also includes a virtual machine monitor that computes one or more first time adjustments based on the offset and applies the adjustments to eliminate at least a first part of the offset.