Virtual Page Storage in Odd-State Flash Memory Cells
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Solution Overview
Problem
Conventional nonvolatile memory devices, such as NAND-type flash memories, face challenges in efficiently programming multi-level cells due to the complexity of error detection and correction required for three-state EEPROM cells, which can result in multi-bit data errors from single cell failures.
Innovation Solution
The implementation of odd-state memory cells that operate as virtual memory cells, allowing programming verification at a single reference voltage and enabling the encoding of three pages of data into two pages of EEPROM cells, thereby reducing the complexity of error detection and correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If three-state EEPROM cells are used to increase storage capacity, then data density is improved, but error detection and correction complexity increases
Solution Approach 1:
The memory array is divided into two separate blocks (first block and second block) that are programmed independently. Each block contains pages of memory cells that can be programmed without affecting the other block, thereby simplifying the programming and error correction process while maintaining high data density through the use of three-state EEPROM cells.
Solution Approach 2:
Data is stored in an encoded format where the original data is transformed into a representation that can be stored across two blocks. This encoding scheme allows the system to leverage the three-state capability of EEPROM cells to achieve higher storage capacity while using standard read/verify operations for error detection and correction.
2Manufacturing precision
If multiple reference voltages are used for programming verification, then programming accuracy is improved, but programming time increases
Solution Approach 1:
The patent uses a single reference voltage (first reference voltage) for programming verification instead of multiple reference voltages. This partial verification approach is sufficient to ensure proper programming of the memory cells while significantly reducing the programming time required. The single reference voltage is applied during read operations to verify that cells have been properly programmed to the desired state.
3Reliability
If odd-state memory cells are used as virtual memory cells, then data integrity is improved, but device structure complexity increases
Solution Approach 1:
The memory device is designed to support both standard programming operations and virtual page programming operations using the same physical memory structure. The two blocks of three-state EEPROM cells can operate independently as separate memory blocks or be combined to form virtual memory pages, providing multi-functionality without requiring additional dedicated structures for each operation mode.
Data Source
AI summary
A nonvolatile memory array includes first and second blocks of three-state memory cells therein. These first and second blocks are configured to operate individually as first and second blocks of physical memory cells, respectively, and collectively as an additional block of virtual memory cells. The first and second blocks of memory cells and the additional block of virtual memory cells may be read independently to provide a total of three blocks of read data.