Virtual Machine ISA Translation Layer for Mixed-Mode Execution

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Solution Overview

Problem

Current virtual machines face performance degradation and increased complexity when executing managed applications that link to native libraries associated with different instruction set architectures, as they require multiple VMs and double translation, which is undesirable and limits execution to only one ISA.

Innovation Solution

A translator, such as the IA-32 Execution Layer, translates native libraries from one ISA to another, allowing managed applications to execute on platforms with different ISAs by using a dynamic binary translator to load and invoke procedures, enabling platform-independent execution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple VMs are used to execute managed applications linked to native libraries with different ISAs, then platform compatibility is improved, but device complexity and execution performance deteriorate due to double translation

Engineering Contradiction:
Improveplatform compatibilityVSAvoidsystem complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a universal VM architecture that can execute managed applications linked to native libraries with different ISAs through a single translation layer. The IA-32 Execution Layer acts as a universal translator that can handle multiple ISA types (x86, x64, ARM, etc.) without requiring separate VM instances for each ISA, thereby achieving multi-functionality in a single system.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent introduces an intermediary translation layer (IA-32 Execution Layer) that mediates between the managed application bytecode and the underlying native libraries with different ISAs. This intermediary layer translates bytecode to IA-32 instructions, which then interface with native libraries through a standardized mechanism, eliminating the need for direct ISA-specific translation paths.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If multiple VMs are used to execute managed applications linked to native libraries with different ISAs, then platform compatibility is improved, but execution speed deteriorates due to double translation

Engineering Contradiction:
Improveplatform compatibilityVSAvoidexecution speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent extracts the translation function from the VM core and places it in a dedicated Execution Layer. This separation allows the VM to compile bytecode to a standardized intermediate representation (IA-32) once, and then the Execution Layer handles the interfacing with various native library ISAs, eliminating redundant translation steps and improving execution speed.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs preliminary compilation of managed application bytecode to IA-32 instructions before runtime execution. This preliminary action creates a standardized intermediate form that can be efficiently executed and interfaced with native libraries, avoiding the need for repeated translation during execution and thereby improving performance.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If a single VM is used without ISA-specific translation, then system complexity is reduced, but the ability to execute applications linked to different ISA native libraries is lost

Engineering Contradiction:
Improvesystem complexityVSAvoidISA compatibility
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent introduces an intermediary translation layer (IA-32 Execution Layer) that mediates between the managed application bytecode and the underlying native libraries with different ISAs. This intermediary layer translates bytecode to IA-32 instructions, which then interface with native libraries through a standardized mechanism, eliminating the need for direct ISA-specific translation paths.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements a universal VM architecture that can execute managed applications linked to native libraries with different ISAs through a single translation layer. The IA-32 Execution Layer acts as a universal translator that can handle multiple ISA types (x86, x64, ARM, etc.) without requiring separate VM instances for each ISA, thereby achieving multi-functionality in a single system.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Adaptability or versatility

If double translation is used to execute managed applications on different ISAs, then ISA compatibility is improved, but execution performance and system simplicity deteriorate

Engineering Contradiction:
ImproveISA compatibilityVSAvoidexecution performance
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent extracts the translation function from the VM core and places it in a dedicated Execution Layer. This separation allows the VM to compile bytecode to a standardized intermediate representation (IA-32) once, and then the Execution Layer handles the interfacing with various native library ISAs, eliminating redundant translation steps and improving execution speed.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs preliminary compilation of managed application bytecode to IA-32 instructions before runtime execution. This preliminary action creates a standardized intermediate form that can be efficiently executed and interfaced with native libraries, avoiding the need for repeated translation during execution and thereby improving performance.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7634768B2Methods and apparatus to support mixed-mode execution within a single instruction set architecture process of a virtual machine
Publication Date: 2009.12.15 INTEL CORP
  • US7634768B2 patent drawing
  • US7634768B2 patent drawing
  • US7634768B2 patent drawing

AI summary

Methods and apparatus to support the execution of a managed application that is linked to a native library or application are disclosed. The disclosed methods and apparatus support a virtual machine that is associated with the same ISA as the executing platform, while the ISA of the native library or application is of a different ISA. The disclosed methods and apparatus also support the execution of a managed application that is linked with several native libraries or applications that are associated with several different ISAs respectively.