Volatile Logic Circuit Non-Volatile Element Redundancy

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Solution Overview

Problem

The yield of semiconductor devices is reduced due to the lack of array configuration in logic circuits targeted by Non-Volatile Power Gating (NVPG) technologies, limiting the application of IO redundancy and Word Line redundancy, which affects the overall yield of non-volatile memories connected to these circuits.

Innovation Solution

A semiconductor device with a volatile logic circuit connected to multiple non-volatile elements through a common connection gate, where each non-volatile element is connected to a control line, allowing for redundant relief and enhanced yield by using ferromagnetic tunnel junction elements or resistance variable elements, with the option of varying sizes and configurations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If Non-Volatile Power Gating is applied to logic circuits without array configuration, then power consumption is reduced during stand-by, but yield is reduced due to inability to apply redundancy techniques

Engineering Contradiction:
Improvepower consumptionVSAvoidyield
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The logic circuit is segmented into multiple storage nodes, each independently connectable to non-volatile elements through connection gates. This segmentation allows selective redundancy application to individual nodes while maintaining the overall circuit functionality and power gating benefits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Connection gates are introduced as intermediary elements between volatile storage nodes and non-volatile elements. These gates enable controlled connection/disconnection, allowing redundancy mechanisms to be activated only when needed for yield improvement while maintaining low-power operation during normal stand-by periods.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If multiple non-volatile elements are connected through the same connection gate, then yield is enhanced through redundant relief, but device complexity increases

Engineering Contradiction:
ImproveyieldVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The connection gate is designed as a universal interface that can connect to multiple non-volatile elements and selectively activate them based on defect detection. This multi-functional gate structure provides redundancy relief capability without requiring separate dedicated circuits for each redundant element, thereby limiting complexity increase.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system implements a select mechanism that can discard defective non-volatile elements and recover functionality by activating alternative redundant elements. This dynamic element selection and recovery process enhances yield by compensating for manufacturing defects while maintaining manageable circuit complexity through systematic element management.

Inventive Principle:
Principle #34Discarding and recovering

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the yield of semiconductor devices by enabling effective redundant relief and maintaining logic state during power restoration, improving the reliability and efficiency of non-volatile memory connections.

Implementation Method 1

The non-volatile elements can be either a ferromagnetic tunnel junction element or a resistance variable element.

Methodology Applied
Scientific EffectFerromagnetism: Ferromagnetism

Implementation Method 2

The non-volatile elements can be either a ferromagnetic tunnel junction element or a resistance variable element.

Methodology Applied
Scientific EffectResistive switching: Electrical Resistance

Data Source

PatentUS10923533B2Semiconductor device having a volatile element and a plurality of non-volatile elements
Publication Date: 2021.02.16 SONY GROUP CORP
  • US10923533B2 patent drawing
  • US10923533B2 patent drawing
  • US10923533B2 patent drawing

AI summary

A volatile logic circuit has a storage node, and stores inputted information. A plurality of non-volatile elements are connected to the storage node of the volatile logic circuit through the same connection gate, and control lines for control for these non-volatile elements are connected to the respective non-volatile elements, every non-volatile element. A plurality of non-volatile elements are connected to the volatile logic circuit through the same connection gate in such a way, thereby enabling the yield to be enhanced.