Volatile Memory Refresh Control via Retention Profiles
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Solution Overview
Problem
Existing memory cell refresh methods in volatile devices, such as DRAM, often consume excessive power due to uniform refresh schedules that disregard individual memory cell characteristics like temperature and process variations, leading to inefficient data integrity maintenance.
Innovation Solution
Implementing a system where a memory controller identifies a 'master' die within a volatile memory device based on retention profile information, using mode registers to determine optimal refresh rates for each bank of memory cells, and sends refresh-ahead signals to coordinate refresh operations across the device, allowing for tailored refresh rates based on temperature and process variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If auto-refresh process is used to control memory cell refreshing, then data integrity is maintained, but power consumption increases due to uniform refresh schedules that disregard individual memory cell characteristics
Solution Approach 1:
The patent implements different refresh rates for different banks of memory cells based on their individual characteristics. Each bank is configured with a specific refresh rate stored in mode registers, allowing memory cells with similar retention characteristics to be grouped together. This local differentiation enables the system to maintain data integrity for each bank according to its specific needs rather than applying a uniform refresh schedule to all memory cells, thereby reducing overall power consumption.
Solution Approach 2:
The patent changes the refresh rate parameter based on memory cell characteristics such as temperature and process variations. By storing different refresh rates in mode registers and selecting appropriate rates based on retention profiles, the system dynamically adjusts the refresh parameter to match actual memory cell needs. This prevents unnecessary frequent refreshing of cells that retain data longer, reducing power consumption while maintaining data integrity.
2Use of energy by moving object
If self-refresh process is used for memory cells, then power consumption is reduced, but data integrity cannot be ensured due to different refresh schedules across memory devices
Solution Approach 1:
The patent implements a hybrid approach where the memory controller provides centralized coordination (auto-refresh functionality) while individual memory devices perform their own refresh operations (self-refresh functionality). The memory controller polls mode registers to determine retention characteristics and coordinates refresh timing, while each memory device independently executes refresh based on its specific needs. This multi-functional approach combines the benefits of both centralized control for data integrity and decentralized execution for power efficiency.
Solution Approach 2:
The patent implements a feedback mechanism where the memory controller polls mode registers to obtain retention profile information from each memory device. Based on this feedback about actual memory cell characteristics, the controller determines appropriate refresh rates and coordinates refresh operations accordingly. This feedback loop ensures that refresh operations are tailored to actual memory needs, maintaining data integrity while avoiding unnecessary power consumption.
3Reliability
If industry standard refresh rate is used for all memory cells, then data integrity is maintained with a guard band, but power consumption increases due to refreshing memory cells more frequently than needed
Solution Approach 1:
The patent divides memory into multiple banks, each with its own refresh rate stored in mode registers. Instead of applying a uniform industry standard refresh rate with guard band to all memory cells, each bank is configured with a specific refresh rate based on its retention characteristics. This local differentiation allows the system to maintain data integrity for each bank according to its specific needs, eliminating the need for conservative uniform refresh schedules and reducing overall power consumption.
Solution Approach 2:
The patent implements refresh operations at different rates for different memory banks, applying refresh action only as needed for each specific bank rather than uniformly to all memory cells. By identifying banks with longer retention times and refreshing them less frequently, the system performs partial refresh action that is sufficient for maintaining data integrity in each bank without the excessive action of uniform frequent refreshing, thereby reducing power consumption.
Data Source
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AI summary
A method includes sending a first signal from a memory device to a memory controller. The first signal indicates to the memory controller that particular memory cells of the memory device are to be refreshed by the memory device.