Voltage Compensated Tracking Circuit in Split-Rail SRAM
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Solution Overview
Problem
Conventional tracking circuits in split-rail SRAMs face challenges in maintaining optimal delay across voltage corners due to uncorrelated variations in periphery and array supply voltages, leading to potential READ operation failures when the sense enable signal is generated before a sufficient minimum voltage is established across bit lines.
Innovation Solution
A discharge control circuit and contention circuit are introduced to adjust the delay in activating transistors based on the relative difference between VDDAR and VDDPR, ensuring optimal tracking delay across voltage corners by using a plurality of inverters and a contention circuit that activates or deactivates the discharge path accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the discharge path is tuned to one voltage corner to optimize performance, then speed is improved, but reliability deteriorates because SE signal is generated before minimum sufficient voltage is established across bit lines
Solution Approach 1:
The patent applies dynamics by making the discharge path activation dynamic rather than fixed. A discharge control circuit dynamically adjusts the discharge path based on the relative magnitude of VDDAR and VDDPR. When VDDAR > VDDPR, the discharge path is activated to optimize speed. When VDDAR < VDDPR, the discharge path is delayed to ensure reliability. This dynamic adjustment resolves the contradiction between speed and reliability across different voltage corners.
Solution Approach 2:
The patent changes the parameter of discharge path activation timing based on voltage corner conditions. By monitoring the relative difference between VDDAR and VDDPR, the circuit changes the discharge path activation parameter accordingly. This parameter change allows the system to optimize for speed when voltages favor fast discharge, and switch to reliability mode when voltage conditions require cautious SE signal generation.
2Reliability
If the discharge path is delayed to ensure reliability at low voltage corners, then reliability is improved, but speed deteriorates due to acceleration of SE signal generation in other voltage corners
Solution Approach 1:
The discharge control circuit dynamically adjusts the discharge path based on real-time voltage conditions. Rather than using a fixed delay, the circuit continuously monitors VDDAR and VDDPR and adjusts discharge path activation accordingly. This dynamic approach ensures reliability when needed while maintaining speed when voltage conditions permit, resolving the contradiction between reliability and speed.
Solution Approach 2:
The patent changes the discharge path activation parameter based on voltage corner detection. When VDDAR < VDDPR, the system changes the discharge timing parameter to ensure reliability. When VDDAR > VDDPR, the parameter is adjusted to optimize speed. This parameter adaptation allows the system to achieve both reliability and speed across different operating conditions.
3Reliability
If tracking circuit is optimized for extreme voltage corners, then reliability is improved, but device complexity increases due to need for multiple optimization paths
Solution Approach 1:
The discharge control circuit serves multiple functions: it monitors voltage corners, determines relative voltage magnitudes, and controls discharge path activation accordingly. This multi-functional approach allows a single circuit to handle multiple voltage corner scenarios without requiring separate optimization paths for each corner, thereby improving reliability while controlling complexity.
Solution Approach 2:
The tracking circuit uses its own voltage inputs (VDDAR and VDDPR) to automatically determine the appropriate discharge path behavior. The circuit self-adjusts based on the relative voltage magnitudes without requiring external control signals or complex configuration. This self-service mechanism simplifies the overall system while ensuring reliable operation across voltage corners.
Data Source
AI summary
Supply voltage compensated tracking circuit in a split-rail static random access memory (SRAM). The circuit includes a tracking circuit for tracking a delay required for generating sense amplifier enable (SE) signal in a memory. The tracking circuit receives an array supply voltage (VDDAR) and a periphery supply voltage (VDDPR). Further, the circuit includes a discharge control circuit, operatively coupled to the tracking circuit, for increasing delay in activating a first transistor of the tracking circuit when VDDAR is higher than VDDPR; and a contention circuit including an output coupled to the first transistor, for delaying a discharge path activation through the first transistor when VDDAR is lower than the VDDPR.