Positive-to-Negative Voltage Conversion With Isolated Power Path
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Solution Overview
Problem
Traditional voltage conversion circuits experience voltage reversing when positive and negative power supply terminals are not synchronized during power-on, posing risks to negative-voltage power supply applications.
Innovation Solution
A positive-to-negative voltage conversion circuit with an on/off control circuit using NMOS and PMOS transistors and resistors to physically isolate the power supply path between positive and negative terminals, preventing voltage reversing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a traditional voltage conversion circuit uses a continuous power supply path between positive and negative terminals, then the circuit structure is simple, but voltage reversing occurs when power sources are not synchronized during power-on
Solution Approach 1:
The power supply path is segmented into multiple independent sections using switching transistors (PMOS and NMOS) that can be independently controlled. The first power supply path section includes the first PMOS transistor and first resistor, while the second power supply path section includes the second PMOS transistor and second resistor. This segmentation allows each section to be independently activated or deactivated, preventing voltage reversing by ensuring that the negative terminal is not powered until the positive terminal is ready.
Solution Approach 2:
The control circuit performs preliminary actions by activating the first power supply path section before the second power supply path section. The first PMOS transistor is turned on first to establish a preliminary voltage state, and only after this preliminary action is complete does the control circuit activate the second PMOS transistor. This preliminary action ensures that the positive terminal is fully powered before the negative terminal begins charging, eliminating the voltage reversing problem.
2Object-affected harmful factors
If a diode is used to limit induced voltage at the negative terminal, then the voltage is reduced to around 0.5V, but application risks remain for negative-voltage power supply circuits
Solution Approach 1:
The harmful effect of induced voltage is completely eliminated by extracting or removing the continuous power supply path that causes it. Instead of merely limiting the induced voltage to 0.5V using a diode, the invention completely prevents the harmful charging current by using controllable switching transistors to block the power supply path until both terminals are ready. This takes out the root cause rather than just mitigating the symptom.
Solution Approach 2:
Controllable switching transistors (PMOS and NMOS) are introduced as intermediary elements between the positive and negative power supply terminals. These intermediaries can be dynamically activated or deactivated based on the power-on status of each terminal. The intermediary transistors prevent direct charging of the negative terminal by the positive terminal until the appropriate conditions are met, thereby eliminating the induced voltage problem while maintaining circuit reliability.
3Reliability
If the power supply path is physically isolated to prevent voltage reversing, then reliability is improved, but the circuit structure becomes more complex with additional transistors and control circuits
Solution Approach 1:
The switching transistors (PMOS and NMOS) perform multiple functions: they act as switches to control the power supply path, they provide voltage level conversion, and they enable the physical isolation necessary to prevent voltage reversing. By making these components multi-functional, the invention reduces the need for separate dedicated components for each function, thereby mitigating the increase in circuit complexity while achieving the desired reliability improvement.
Data Source
AI summary
The present invention discloses a highly reliable positive-to-negative voltage conversion circuit, including a first inverter, a first buffer, a second buffer, a first to seventh NMOS transistors, a first to third PMOS transistors, a first resistor, a second resistor, a third resistor, and a fourth resistor, wherein the third PMOS transistor, the third NMOS transistor, the fourth NMOS transistor, the fifth NMOS transistor, the sixth NMOS transistor and the seventh NMOS transistor form an on/off control circuit, with that a power supply path between a positive-voltage power supply terminal and a negative-voltage power supply terminal is physically isolated by the on/off control circuit to eliminate voltage reversing occurring when the positive-voltage power supply terminal and the negative-voltage power supply terminal cannot be synchronized during power-on.