Voltage Detection Circuit for Memory Systems
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Solution Overview
Problem
Embedded non-volatile memory systems face compatibility issues with varying supply voltage levels from hosts, requiring costly hard-wired configurations and substrate designs, and current analog circuitry configurations are not compatible with lower supply voltage levels.
Innovation Solution
The use of a host clock signal to detect the supply voltage level and configure a core regulator into either a regulation or bypass mode, allowing the system to operate with different supply voltage levels without additional configuration pins or substrate designs, and the implementation of multiple supply voltage domains within the analog circuitry to manage power modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If hard-wired configurations pins and different substrate designs are used to ensure compatibility with different host supply voltage levels, then compatibility is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The system automatically detects the supply voltage level from the host and configures its internal circuitry without requiring external configuration pins or manual setup. The memory device self-adapts to the host's voltage level (1.2V, 1.8V, or 3.3V) through voltage detection circuitry that triggers appropriate configuration modes, eliminating the need for hard-wired configuration solutions.
Solution Approach 2:
The patent changes the operating parameters of internal circuits based on the detected supply voltage level. When different voltage levels are detected, the system adjusts configuration parameters such as enabling/disabling specific circuit blocks, modifying regulator behavior, and changing operational modes to ensure compatibility across 1.2V, 1.8V, and 3.3V hosts without requiring physical hardware changes.
2Reliability
If current analog circuitry configurations are used, then robust performance is maintained, but compatibility with lower supply voltage levels is lost
Solution Approach 1:
The analog circuitry is designed with dynamic configuration capabilities that allow it to adapt its operating characteristics based on the supplied voltage level. The system transitions from static, fixed configurations to dynamic, voltage-adaptive configurations, enabling the same circuit to operate robustly across 1.2V, 1.8V, and 3.3V supplies by adjusting bias conditions, enabling/disabling circuit paths, and modifying operational parameters according to the detected voltage level.
3Adaptability or versatility
If additional configuration pins are added to detect supply voltage levels, then adaptability is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The system uses existing signal lines and internal circuitry to detect supply voltage levels without requiring additional configuration pins. The voltage detection is performed automatically using the power supply lines themselves, and the system self-configures based on detected levels, eliminating the need for extra pins and reducing manufacturing complexity.
Data Source
AI summary
An apparatus may include detection circuitry configured to detect a presence of a host clock signal on a host clock line, and detect a level of a host supply voltage upon detection of the host clock signal. The detection circuitry may configure a core regulator in a regulation mode or in a bypass mode based on the detected level of the host supply voltage. Additionally, components of analog circuitry of a non-volatile memory system may be partitioned into different supply voltage domains, with those components active during a sleep state receiving one supply voltage and those components inactive during the sleep state receiving a different supply voltage.