DRAM Voltage Regulator Over-Drive Circuit Design
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Solution Overview
Problem
Designing on-chip voltage regulators for high-density DRAM chips to provide a stable voltage level (VCCSA) with sufficient current is challenging due to abrupt current consumption during bit line sensing and restoration operations, leading to potential data flipping issues caused by too strong or weak voltage signals.
Innovation Solution
A voltage regulator comprising an over-drive circuit and control circuit, which includes a voltage divider, comparator, PMOS transistors, delay unit, inverter, AND gate, and NMOS transistors, regulates the voltage signal VCCSA by adjusting the over-drive signal based on a sense signal and external power variations, preventing data flipping by maintaining a stable voltage level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If over-drive design is used to supply voltage signal VCCSA, then data flip is avoided, but voltage signal VCCSA becomes too strong or weak due to external power VDD variation
Solution Approach 1:
The patent implements a feedback mechanism where the sense signal from the sensing amplifier is fed back to the over-drive circuit through a delay unit and control logic. The over-drive circuit monitors the sense signal status and dynamically adjusts the over-drive signal strength and duration, ensuring the voltage signal VCCSA remains within appropriate levels despite external power VDD variations, thus preventing data flip while avoiding excessive voltage strength.
Solution Approach 2:
The patent makes the over-drive signal dynamic by controlling its duration and strength based on the sense signal assertion state. The delay unit introduces a time delay to create a pulse-width modulated over-drive signal that adapts to real-time operating conditions. This dynamic control allows the system to provide strong over-drive when needed (during sensing) and reduce it when not needed, optimizing both data stability and voltage signal control.
2Power
If external power VDD is increased to cover maximum level variations, then sufficient current is provided, but power consumption increases and minimum level exceeds requirements
Solution Approach 1:
The patent employs periodic action by using the delay unit to generate time-limited over-drive pulses only when the sense signal is asserted. Instead of continuously providing maximum current, the system delivers high current in periodic bursts during sensing operations, then reduces current to minimum levels during non-sensing periods. This approach ensures sufficient current supply capability during critical operations while minimizing overall power consumption.
Solution Approach 2:
The patent changes the current supply parameter dynamically based on operational state. During sensing operations, the over-drive circuit increases current supply to maximum levels to ensure reliable voltage restoration. During non-sensing operations, the current supply is reduced to minimum levels. This parameter change is controlled by the sense signal and delay unit, allowing the system to adapt current supply to actual needs, thus providing sufficient power when required while minimizing energy loss.
Data Source
AI summary
A voltage regulator including an over-drive circuit and a control circuit is illustrated. The over-drive circuit receives a first voltage signal output from a sensing amplifier in a DRAM circuit, and regulates the first voltage signal according to an over-drive signal. The a control circuit electrically connected to the over-drive circuit receives a sense signal, and outputs the over-drive signal according to the sense signal, wherein the sense signal is asserted when a bit line in the DRAM circuit is sensed that an restoring and operation is performed. The over-drive signal goes down to a level of a second voltage signal from a current level thereof dependent on an external power merely when the sense signal is asserted but has not been asserted for a delay time, or otherwise, the over-drive signal is equal to the external power.