Voltage Regulator Compensation Circuit for High-PSRR Noise Rejection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional linear voltage regulators face challenges in achieving high Power Supply Rejection Ratio (PSRR) over a wide frequency range without incurring large device size and high power consumption.
Innovation Solution
Incorporating a compensation capacitance between the power supply terminal and a virtual ground node in the differential amplifier of a linear voltage regulator circuit to reduce the effects of degrading capacitances, thereby improving PSRR without increasing device size or power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional approaches (wide bandwidth and high gain) are used to maintain high PSRR, then PSRR performance is improved, but device size increases and power consumption increases
Solution Approach 1:
The patent introduces a compensation capacitor as an intermediary element connected between the power supply terminal and the gate node of the output transistor. This capacitor acts as a mediator that provides an alternative current path, reducing the impact of parasitic capacitances on the gate node. By using this intermediary component, the circuit achieves high PSRR without requiring large bandwidth or high gain that would otherwise increase power consumption
Solution Approach 2:
The patent modifies the circuit parameters by adding a compensation capacitor with a specific capacitance value. This parameter change alters the frequency response and impedance characteristics of the gate node, effectively reducing the degradation caused by parasitic capacitances. The parameter modification enables high PSRR performance without the need for high bandwidth or high gain settings that would consume more power
2Reliability
If conventional approaches (wide bandwidth and high gain) are used to maintain high PSRR, then PSRR performance is improved, but device size increases
Solution Approach 1:
The compensation capacitor serves as a compact intermediary element that provides the necessary current path to mitigate capacitance effects. This single capacitor component achieves the PSRR improvement without requiring large transistors or complex circuit topologies that would increase device area
Solution Approach 2:
By changing the circuit parameter through capacitor addition rather than increasing transistor sizes or bandwidth, the patent achieves high PSRR with minimal increase in device area. The parameter modification approach is more space-efficient than conventional methods
3Device complexity
If capacitances are present at the gate node of the output transistor, then the circuit structure is simple, but PSRR is degraded
Solution Approach 1:
The patent converts the harmful effect of parasitic capacitances into a beneficial configuration by adding a compensation capacitor. The compensation capacitor's presence creates a dominant pole that actually improves PSRR by reducing the impact of other parasitic capacitances at the gate node. This approach maintains circuit simplicity while transforming the capacitance issue into a solution
Solution Approach 2:
The compensation capacitor acts as an intermediary that manages the interaction between the power supply terminal and the gate node capacitances. By providing a controlled current path through this intermediary capacitor, the circuit maintains simple structure while achieving improved PSRR performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively enhances PSRR by providing a current path that mitigates the impact of capacitances, achieving significant improvements in noise rejection while maintaining efficient power usage.
Implementation Method 1
a compensation capacitor coupled between a power supply terminal and a virtual ground node in the differential amplifier to provide a current path between the power supply terminal and the gate node of the output transistor
Data Source
AI summary
A voltage regulator circuit includes a power supply terminal and a ground terminal, and a differential amplifier coupled between the power supply terminal and the ground terminal. The voltage regulator circuit also includes an output transistor, which includes a gate node coupled to an output node of the differential amplifier to receive a gate voltage and to provide a regulated output voltage at an output node of the output transistor. The differential amplifier is configured to provide the gate voltage based on a differential between a reference voltage and the regulated output voltage. The voltage regulator also includes a compensation capacitance coupled between a virtual ground node in the differential amplifier and either the power supply terminal or the ground terminal and a virtual ground node in the differential amplifier.


