Voltage Supply Device for Nonvolatile Memory Using Medium Voltage MOS

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Solution Overview

Problem

Existing voltage supply devices for semiconductor memory cells require multiple voltage levels for operations like read, erase, and program, but they often rely on high voltage MOS transistors that are costly and inefficient, especially when using high drain junction breakdown voltages.

Innovation Solution

A voltage supply device utilizing medium voltage MOS transistors with breakdown voltages between approximately 7 volts to 15 volts, incorporating a bias generator, control signal generator, and cell switching circuit to divide and manage supply voltages, eliminating the need for high voltage transistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high voltage MOS transistors are used to generate multiple voltage levels for memory cell operations, then the required voltage levels can be achieved, but the cost increases and operational efficiency decreases

Engineering Contradiction:
Improvevoltage generation capabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The voltage supply device is divided into multiple independent modules: a first voltage supply device generating first and second voltages, a second voltage supply device generating third and fourth voltages, and a control unit. Each module operates independently with medium voltage transistors, eliminating the need for expensive high voltage transistors while maintaining the capability to provide all required voltage levels for memory cell operations.

Inventive Principle:
Principle #1Segmentation

2Reliability

If high voltage MOS transistors with high drain junction breakdown voltages are used, then high voltage generation is achieved, but operational efficiency deteriorates

Engineering Contradiction:
Improvevoltage level capabilityVSAvoidoperational efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent changes the voltage parameter specification from high voltage (requiring transistors with high drain junction breakdown voltages) to medium voltage operation. The control unit intelligently selects and supplies appropriate voltage levels (first, second, third, or fourth voltages) based on operational requirements, achieving the same functional outcome with medium voltage transistors that have superior operational efficiency and lower power consumption.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If multiple voltage levels are generated using conventional voltage supply devices, then memory cell operations are supported, but device complexity increases

Engineering Contradiction:
Improvevoltage level diversityVSAvoidtransistor voltage requirements
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Each voltage supply device is designed to generate multiple voltage levels (first and second voltages from one device, third and fourth voltages from another), and the control unit universally manages all voltage supply operations. This multi-functional design allows the system to support all memory cell operations (read, write, erase) using medium voltage transistors, reducing complexity compared to using high voltage transistors for all operations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9620185B1Voltage supply devices generating voltages applied to nonvolatile memory cells
Publication Date: 2017.04.11 SK HYNIX INC
  • US9620185B1 patent drawing
  • US9620185B1 patent drawing
  • US9620185B1 patent drawing

AI summary

A voltage supply device includes a bias generator, a control signal generator and a cell switching circuit. The bias generator divides a first supply voltage to output a plurality of divided supply voltages. The control signal generator receives the plurality of divided supply voltages to generate a plurality of control signals. The cell switching circuit receives the plurality of control signals to provide nonvolatile memory cells with one or more of a ground voltage, the first supply voltage, or a second supply voltage different from the first supply voltage. Each of the bias generator, the control signal generator and the cell switching circuit is implemented with medium voltage MOS transistors having a breakdown voltage of from approximately 7 volts to approximately 15 volts.