VTFET Bottom Isolation Layer Parasitic Leakage Reduction
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Solution Overview
Problem
As the pitch between vertical transport field effect transistor (VTFET) fins decreases, current fabrication processes face difficulties in forming deep isolation regions, leading to high likelihoods of parasitic leakage paths and failure mechanisms such as latch-up due to shallow trench isolation layers.
Innovation Solution
A bottom isolation layer is formed under the bottom epitaxy regions of VTFET devices, which suppresses parasitic leakage paths and parasitic capacitance, preventing failures like latch-up by creating a deeper isolation layer through the formation of a sacrificial layer and subsequent insulating layer within the cavity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the pitch between VTFET fins is decreased to increase device density, then device density is improved, but the likelihood of parasitic leakage paths and latch-up increases due to insufficient isolation depth
Solution Approach 1:
The patent transitions from two-dimensional planar isolation to three-dimensional vertical isolation by forming an insulating layer that extends beneath the source/drain regions. This vertical dimension provides additional isolation depth without increasing lateral pitch, effectively suppressing parasitic leakage paths and latch-up while maintaining high device density.
Solution Approach 2:
The insulating layer is formed preliminarily beneath the source/drain regions before final device assembly. This preliminary action ensures that isolation is established in advance, preventing parasitic leakage paths and latch-up from developing during subsequent processing and device operation.
2Ease of manufacture
If shallow trench isolation layers are used to simplify fabrication, then manufacturing complexity is reduced, but parasitic leakage paths and latch-up occur due to insufficient isolation depth
Solution Approach 1:
The isolation structure is segmented into multiple functional zones: the shallow trench isolation layer provides initial isolation and structural support, while the additional insulating layer beneath the source/drain regions provides enhanced electrical isolation. This segmentation allows each layer to perform its specific function optimally, combining fabrication simplicity with effective parasitic suppression.
Solution Approach 2:
The insulating layer acts as an intermediary element between the substrate and the source/drain regions. It mediates the electrical isolation function by providing a dedicated barrier that specifically targets parasitic leakage paths without interfering with the overall fabrication simplicity or requiring complete redesign of the shallow trench isolation process.
3Device complexity
If shallow trench isolation layers are used to reduce process complexity, then process complexity is reduced, but parasitic capacitance increases due to inadequate isolation depth
Solution Approach 1:
The patent addresses parasitic capacitance by extending isolation into the vertical dimension. The insulating layer beneath the source/drain regions increases the distance between conductive elements, thereby reducing capacitive coupling without adding lateral complexity to the fabrication process.
Data Source
AI summary
A semiconductor device structure comprises at least one semiconductor fin for a vertical transport field effect transistor, a bottom source/drain layer, and an insulating layer underlying the bottom source/drain layer. A method of forming the structure comprises forming a sacrificial layer within a lower portion of a source/drain region for a vertical transport field effect transistor structure. The sacrificial layer being formed adjacent to at least one semiconductor fin and in contact with a substrate. A source/drain layer is formed within an upper portion of the source/drain region above the sacrificial layer. The sacrificial layer is removed thereby forming a cavity between the substrate and the source/drain layer. An insulating layer is formed within the cavity.