Wafer Bonding Misalignment Compensation via Shifted Contacts
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Solution Overview
Problem
Wafer-bonding technologies face significant misalignment issues during the bonding of semiconductor wafers, which complicates the coupling of memory circuitry with peripheral circuitry, leading to difficulties in integrated assembly.
Innovation Solution
The method involves shifting contacts on one wafer to compensate for misalignment by using redundant components and equations to determine the specific components to replace, enabling proper coupling despite misalignment, and utilizing redundant wordlines and bitlines to align with corresponding components on the second wafer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If wafer-bonding technology is used to construct three-dimensional integrated assemblies, then integration of memory and peripheral circuitry is enabled, but significant misalignment occurs between bonded wafers
Solution Approach 1:
The patent applies preliminary action by forming contacts at shifted reference positions before bonding occurs. The contacts are positioned at multiple possible locations corresponding to potential alignment errors, allowing the system to pre-compensate for misalignment that will occur during bonding. This enables accurate coupling without requiring perfect alignment during the bonding process itself.
Solution Approach 2:
The patent changes the positional parameter of contacts from fixed reference positions to shifted reference positions. By calculating and applying specific shift amounts based on expected alignment errors, the contact positions are adjusted to compensate for anticipated misalignment, transforming the alignment problem into a solvable positioning challenge.
2Reliability
If alignment compensation methodologies are developed for wafer-bonding, then coupling of memory circuitry with peripheral circuitry is enabled, but device complexity increases
Solution Approach 1:
The patent segments the contact formation process into multiple discrete steps: forming contacts at shifted reference positions, determining alignment errors after bonding, and selectively removing or retaining contacts based on actual alignment. This segmentation transforms a complex alignment problem into manageable sequential operations, reducing overall process complexity while maintaining high coupling accuracy.
Data Source
AI summary
Some embodiments include a method in which a first semiconductor wafer and a second semiconductor wafer are bonded with each other. The first semiconductor wafer includes a memory cell array, and the second semiconductor wafer includes a circuit to access the memory cell array. After the bonding, contacts are formed to be associated with the first semiconductor wafer. The contacts are for electrical connections between the first and second semiconductor wafers. The contacts are linked with reference positions, with each of the contacts being linked with an associated one of the reference positions. Each of the contacts is shifted from its associated one of the reference positions to absorb a bonding alignment error between the first and second semiconductor wafers.