Wafer Bonding Layout for Controlled Peripheral Debonding
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Solution Overview
Problem
Current semiconductor device manufacturing methods face challenges in efficiently bonding and debonding substrates with semiconductor circuits, leading to issues such as incomplete bonding and substrate separation during the formation of semiconductor circuits, which affects yield and reusability of substrates.
Innovation Solution
The method involves forming a de-bondable layer at the outer peripheral portion of one substrate and a predetermined depth on the other, allowing for controlled bonding and separation using tensile stress, thereby improving the bonding strength between insulating layers and reducing the risk of substrate separation during semiconductor circuit formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a de-bondable layer is provided across the entire surface of the lower layer of the semiconductor circuit of one substrate, then substrate separation can be achieved, but incomplete bonding and substrate separation during semiconductor circuit formation occur, affecting yield
Solution Approach 1:
The de-bondable layer is selectively positioned only at the outer peripheral portion of the substrate rather than across the entire surface. This local placement ensures that the de-bondable layer does not interfere with the bonding process in the central region where semiconductor circuits are formed, while still enabling substrate separation at the periphery. The localized de-bondable layer prevents incomplete bonding and substrate separation issues that occur with full-surface de-bondable layers.
2Ease of manufacture
If substrates are bonded together for manufacturing semiconductor circuits, then integration is achieved, but substrate separation during circuit formation causes defects and reduces yield
Solution Approach 1:
The substrate surface is segmented into two functional regions: a central bonding region where insulating layers are bonded together for semiconductor circuit formation, and a peripheral de-bondable layer region that enables controlled separation. This segmentation allows the bonding process to proceed reliably in the central region while providing a dedicated separation path at the periphery, preventing unwanted substrate separation during manufacturing.
3Reliability
If the de-bondable layer is formed across the entire substrate surface, then substrate separation is enabled, but bonding strength between insulating layers is reduced
Solution Approach 1:
The de-bondable layer is localized to the outer peripheral portion of the substrate, creating a spatial distinction between the bonding region (central area with strong insulating layer bonding) and the de-bonding region (peripheral area with de-bondable layer). This local placement preserves bonding strength in the central region where semiconductor circuits are formed, while maintaining substrate separation capability at the periphery where the de-bondable layer is positioned.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the yield ratio in semiconductor device manufacturing by ensuring reliable substrate separation without grinding, allowing for substrate reuse and reducing manufacturing costs.
Implementation Method 1
forming a second layer with a predetermined width at an outer peripheral portion of a second substrate; bonding a surface of the first substrate on a side provided with the first semiconductor circuit and a surface of the second substrate on a side provided with the second semiconductor circuit; and debonding the first layer and the second layer, thereby forming the second substrate including the first semiconductor circuit and the second semiconductor circuit
Data Source
AI summary
A semiconductor device manufacturing method of an embodiment includes forming a first layer in a region of a first substrate excluding an outer peripheral portion thereof; forming a first semiconductor circuit above the first layer; for a second semiconductor circuit on a second substrate; forming a second layer with a predetermined width at an outer peripheral portion of the second substrate; bonding a surface of the first substrate on a side provided with the first semiconductor circuit and a surface of the second substrate on a side provided with the second semiconductor circuit; and applying tensile stress to the first layer and the second layer to debond the first layer and the second layer, thereby forming the second substrate including the first semiconductor circuit and the second semiconductor circuit.