Semiconductor Wafer Cleaving via Roughened-Layer Crack Initiation
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Solution Overview
Problem
Conventional manufacturing methods for semiconductor devices using harder materials like silicon carbide (SiC) face issues such as increased load on blades, higher manufacturing costs due to multiple processes, and high residual stress leading to cracks and reduced reliability.
Innovation Solution
A method involving grinding the semiconductor wafer to form a roughened layer, forming a vertical crack on this layer, and then cleaving the wafer into pieces using the crack as a starting point, reducing the scribing pressure and residual stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a blade is pressed against a smooth semiconductor wafer surface to form a vertical crack, then the cracking process can be initiated, but high scribing pressure is required which increases blade load and manufacturing cost
Solution Approach 1:
The patent applies local quality by creating a roughened layer only at specific locations where vertical cracks need to be formed. This roughened layer is formed by selective grinding or mechanical treatment of the semiconductor wafer surface, creating localized regions with increased surface roughness that serve as stress concentration points for crack initiation, while the rest of the wafer surface remains smooth and intact.
Solution Approach 2:
The patent implements preliminary action by pre-forming the roughened layer on the semiconductor wafer surface before the cracking process. This preliminary surface modification creates predetermined sites that facilitate subsequent crack propagation when pressure is applied, eliminating the need for high-pressure blade scribing and reducing both blade load and manufacturing complexity.
2Strength
If multiple processing steps are used to manufacture semiconductor devices with harder materials, then material hardness requirements are met, but manufacturing cost increases
Solution Approach 1:
The patent extracts and eliminates unnecessary processing steps from the manufacturing flow. By using the roughened layer technique, the patent removes the need for laser beam processing and complex multi-step cracking procedures, simplifying the manufacturing process while maintaining effectiveness for hard semiconductor materials like silicon carbide.
Solution Approach 2:
The patent changes the surface parameter (roughness) of the semiconductor wafer to achieve the desired cracking behavior. By modifying the surface roughness parameter locally through grinding or mechanical treatment, the patent enables controlled crack formation without requiring changes to the bulk material properties or additional complex processing equipment.
3Manufacturing precision
If high pressure is applied during the scribing process, then vertical cracks can be formed, but residual stress increases leading to cracks and reduced reliability
Solution Approach 1:
The patent applies local quality by concentrating the surface modification only at the regions where vertical cracks are needed. The roughened layer is formed selectively at these locations, creating localized stress concentration points that guide crack propagation along desired paths without inducing widespread residual stress across the entire wafer, thus maintaining device reliability.
Solution Approach 2:
The patent implements preliminary action by pre-forming the roughened layer before the cracking process. This preliminary surface preparation creates controlled initiation sites for cracks, allowing the subsequent cracking step to proceed at lower pressures and reducing the generation of harmful residual stresses that would compromise device reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces residual stress and manufacturing costs while maintaining reliability by minimizing blade load and eliminating the need for laser beam processes.
Implementation Method 1
a roughened layer is formed by grinding the second surface of the semiconductor wafer
Implementation Method 2
a blade is pressed against the roughened layer to form a vertical crack in a surface layer of the semiconductor wafer
Implementation Method 3
the first surface of the semiconductor wafer is pressed and the semiconductor wafer is cleaved into multiple pieces with the vertical crack as a starting point
Data Source
AI summary
In a manufacturing method of a semiconductor device, a semiconductor wafer that is made of a semiconductor material harder than silicon and has a first surface and a second surface opposite to each other is prepared, a roughened layer is formed by grinding the second surface of the semiconductor wafer, a blade is pressed against the roughened layer to form a vertical crack in a surface layer of the semiconductor wafer, the roughened layer is removed after the vertical crack is formed, a rear surface electrode is formed on a rear surface of the semiconductor wafer on which the vertical crack is formed, and after the rear surface electrode is formed, the first surface of the semiconductor wafer is pressed and the semiconductor wafer is cleaved into multiple pieces with the vertical crack as a starting point.