Semiconductor Wafer Dicing via Rear-Surface Circuit Pattern Recognition

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Solution Overview

Problem

Current methods for manufacturing semiconductor devices face challenges in efficiently obtaining singulated semiconductor chips with adhered adhesive layers, particularly due to contamination, scattering, and inefficient alignment during the dicing process, which affects adhesive strength and manufacturing yield.

Innovation Solution

A method involving a layered product of dicing tape, adhesive layer, and semiconductor wafer, where the cutting position is recognized by observing the circuit pattern from the rear surface, allowing precise cutting and peeling to prevent contamination and scattering, and ensuring accurate alignment and bonding with a wiring substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional dicing methods are used to singulate semiconductor chips, then chip production can be achieved, but contamination and scattering occur during the process

Engineering Contradiction:
Improvechip production efficiencyVSAvoidcontamination and scattering
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The adhesive layer is applied to the semiconductor wafer before the dicing process. This preliminary action ensures that when the wafer is cut into individual chips, the adhesive remains attached to each chip without scattering or contamination, solving the harmful effects observed in conventional methods where adhesive is applied after dicing

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention combines multiple functions into a single integrated process: the adhesive layer serves both as a bonding agent and as a protective layer during dicing. By merging the adhesive application step with the dicing process sequence, the method eliminates the need for separate adhesive application steps that could cause contamination or scattering

Inventive Principle:
Principle #5Merging (Combining)

2Manufacturing precision

If adhesive layer is applied after dicing, then chip singulation is achieved, but alignment accuracy with wiring substrate deteriorates

Engineering Contradiction:
Improvechip singulation accuracyVSAvoidalignment accuracy
Core Design Contradiction:
Manufacturing precisionVSMeasurement precision

Solution Approach 1:

The adhesive layer is applied to the semiconductor wafer before dicing, allowing the adhesive pattern to be transferred precisely to each individual chip during the cutting process. This preliminary application ensures that alignment marks and circuit patterns remain accurately positioned relative to the adhesive, maintaining measurement precision for subsequent bonding operations

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The adhesive layer pattern is effectively copied from the wafer level to the individual chip level through the dicing process. The adhesive configuration on the wafer is replicated on each singulated chip, ensuring consistent alignment accuracy without requiring separate alignment procedures for each chip

Inventive Principle:
Principle #26Copying

3Productivity

If chip scattering occurs during dicing, then manufacturing yield decreases, but preventing scattering requires additional process steps

Engineering Contradiction:
Improvemanufacturing yieldVSAvoidprocess steps
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

By applying the adhesive layer before dicing, the invention prevents chip scattering during the cutting process. The adhesive acts as a temporary holding mechanism that keeps chips attached to the wafer or to each other during handling, eliminating the need for additional process steps to retrieve or reposition scattered chips, thereby improving manufacturing yield

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The adhesive layer provides self-service functionality during the dicing and handling process. It automatically prevents chip scattering and maintains chip positioning without requiring external intervention or additional process steps, simplifying the overall manufacturing process while improving yield

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the efficient production of pollution-free singulated semiconductor chips with excellent adhesive strength and improved manufacturing yield by preventing chip scattering and ensuring precise alignment and bonding.

Implementation Method 1

bonding the wiring substrate and the semiconductor chip via the adhesive layer

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 2

recognizing a cutting position by recognizing the circuit pattern in the circuit surface from a surface opposite to the circuit surface of the semiconductor wafer

Methodology Applied
Scientific EffectOptical detection:

Implementation Method 3

preparing a layered product in which a dicing tape, an adhesive layer, and a semiconductor wafer are stacked in this order

Methodology Applied
Scientific EffectLayered stacking: Lamination

Data Source

PatentUS8034659B2Production method of semiconductor device and bonding film
Publication Date: 2011.10.11 RESONAC CORP
  • US8034659B2 patent drawing
  • US8034659B2 patent drawing
  • US8034659B2 patent drawing

AI summary

To provide a method of manufacturing semiconductor devices, the method being capable of efficiently obtaining a singulated semiconductor chip upon which an adhesive is adhered and also capable of excellently bonding a semiconductor chip to a wiring substrate, and provide an adhesive film. A layered product 60 in which a dicing tape 9, an adhesive layer 3, and a semiconductor wafer 6 are stacked in this order so that a circuit surface 6a of the semiconductor wafer 6 may face the dicing tape 9 side. A cutting position is recognized by recognizing a circuit pattern P in the circuit surface 6a from a rear surface 6b of the semiconductor wafer 6. At least the semiconductor wafer 6 and the adhesive layer 3 are cut in the thickness direction of the layered product 60. The dicing tape 9 is cured to peel off the dicing tape 9 and the adhesive layer 3. A projection electrode 4 of a semiconductor chip 26 is aligned with a wiring 12 of a wiring substrate 40. The wiring substrate 40 and the semiconductor chip 26 are bonded via an adhesive layer 23 so that the wiring 12 and the projection electrode 4 may be electrically connected to each other.