Semiconductor Wafer Nanotopography Improvement via Double-Side Planarization
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Solution Overview
Problem
Existing semiconductor wafer processing methods fail to adequately address nanotopography issues, particularly when using fixed abrasive grain wires, leading to significant processing damage and large waves on the wafer surface, which deteriorate nanotopography quality.
Innovation Solution
Implementing a secondary grinding step with concurrent double-side planarization after slicing, followed by application of a curable material and surface grinding, to reduce wave components in specific wavelength ranges and improve nanotopography quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a fixed abrasive grain wire is used for slicing the semiconductor ingot, then the slicing speed is improved, but the processing damage increases and large waves are generated on the wafer surface, deteriorating nanotopography quality
Solution Approach 1:
The patent applies preliminary action by performing a first surface grinding step immediately after slicing to remove the waves and processing damage generated during high-speed slicing with fixed abrasive grain wires. This preliminary grinding prevents the deterioration of nanotopography quality before subsequent processing steps
Solution Approach 2:
The patent segments the surface treatment process into multiple distinct steps: first surface grinding to remove waves, resin application, and second surface grinding. This segmentation allows each step to address specific surface issues independently, effectively resolving the nanotopography problem while maintaining high slicing speed
2Manufacturing precision
If grinding is performed while the wafer is held on the holding surface by suction, then a flat reference surface is created, but when holding by suction is terminated, the waves return to the original state, and the planarized surface is lost
Solution Approach 1:
The patent applies preliminary action by performing the first surface grinding step while the wafer is held on the holding surface by suction to create a flat reference surface. This preliminary planarization establishes a stable baseline before subsequent processing
Solution Approach 2:
The patent introduces resin as an intermediary material that is applied to the planarized surface before the second surface grinding step. This resin layer maintains the flat reference surface characteristics and prevents wave recovery, allowing the second grinding to proceed with stable reference
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces waves on the semiconductor wafer surface, enhancing nanotopography quality even when using fixed abrasive grain wires, resulting in a wafer with improved flatness and reduced nanotopography characteristics.
Implementation Method 1
slicing a semiconductor single-crystal ingot by using a wire saw apparatus
Implementation Method 2
performing surface grinding on the other surface of the wafer
Implementation Method 3
forming a flat application layer by applying a curable material to the whole of one surface of the wafer
Data Source
AI summary
In a wafer processing method by which, by using, as a reference surface, a flat surface obtained by applying a curable material to the whole of one surface of a wafer obtained by slicing a semiconductor single-crystal ingot by using a wire saw apparatus, surface grinding is performed on the other surface of the wafer and surface grinding is performed on the one surface of the wafer by using the other surface of the wafer subjected to surface grinding as a reference surface, both surfaces of the wafer are planarized at the same time immediately after the wafer is obtained by slicing.