Wafer Edge Trimming With Flange Pattern for Crack-Free Thinning
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Solution Overview
Problem
The wafer thinning process in semiconductor manufacturing often damages the wafer edge during grinding, leading to edge cracking issues due to insufficient stress resistance, which can result in peeling and damage to the underlying carrier wafer during subsequent grinding processes.
Innovation Solution
A trimming method involving edge trimming and grinding processes is employed, where a flange pattern is formed by trimming the semiconductor substrate's edge region without cutting through, allowing the edge region to be removed without damaging the device layer, and the grinding process focuses on thinning the central region while maintaining the flange pattern's integrity to prevent edge cracking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the grinding process is performed on the backside of the semiconductor wafer to thin the wafer, then the wafer thickness is reduced, but the wafer edge is damaged due to insufficient stress resistance
Solution Approach 1:
The wafer is divided into two functional regions: a central region that undergoes grinding for thinning, and an edge region that is preserved. This segmentation allows selective processing where only the necessary area (central region) is subjected to the harmful grinding action, while the vulnerable edge region is protected through the bonding structure.
Solution Approach 2:
The semiconductor wafer is bonded to a carrier wafer before the grinding process. This preliminary bonding action provides mechanical support and stress resistance to the wafer edge during subsequent grinding, preventing edge damage while allowing the central region to be thinned effectively.
2Object-affected harmful factors
If the edge trimming process is performed to remove the outer edge of the wafer, then edge damage is prevented, but the device layer may be damaged if trimming is too aggressive
Solution Approach 1:
The trimming process applies different treatment to different regions: the edge region is trimmed to remove damaged portions, while the central region containing the device layer is preserved with minimal or no trimming. This localized approach ensures edge integrity while protecting the device layer from damage.
Solution Approach 2:
The trimming process removes only the necessary portion of the edge region without cutting through to the device layer. This partial action is sufficient to prevent edge damage while avoiding excessive removal that would compromise the device layer integrity.
3Reliability
If the wafer edge is preserved during grinding, then edge cracking is prevented, but the grinding process becomes more complex requiring selective masking or bonding
Solution Approach 1:
A carrier wafer is introduced as an intermediary element that supports the semiconductor wafer during grinding. This mediator provides the necessary mechanical strength and stress resistance to prevent edge cracking, while simplifying the overall process compared to complex masking techniques by using a physical support structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively prevents edge cracking and peeling during grinding by ensuring the edge region is not ground, thereby preserving the device layer's edge shape and reducing the need for sealants, while protecting the underlying carrier wafer from damage.
Implementation Method 1
The first wafer is bonded to a second wafer with the first side of the substrate facing toward the second wafer
Data Source
AI summary
A trimming method is provided. The trimming method includes the following steps. A first wafer including a substrate and a device layer over a first side of the substrate is provided. The first wafer is bonded to a second wafer with the first side of the substrate facing toward the second wafer. An edge trimming process is performed to remove a trimmed portion of the substrate from a second side opposite to the first side vertically downward toward the first side in a first direction along a perimeter of the substrate, wherein the edge trimming process results in the substrate having a flange pattern laterally protruding from the device layer and laterally surrounding an untrimmed portion of the substrate along a second direction perpendicular to the first direction. A grinding process is performed on the untrimmed portion of the substrate from the second side to thin the untrimmed portion of the substrate to a reduced thickness in the first direction, wherein the grinding process results in the reduced thickness being greater than a thickness of the flange pattern.