Wafer Edge Geometry Metrics for Early Overlay Error Prediction
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Solution Overview
Problem
Conventional metrology tools only provide sufficient wafer measurements after initial fabrication stages, failing to predict overlay errors caused by elastic deformation during further processing, and lack pre-fabrication distortion prediction using front-end processed wafer flatness inspection.
Innovation Solution
A method and system using Gapi wafer geometry metrics generated from front-end processed semiconductor wafers to predict in-plane distortion, involving measurement data analysis, center plane determination, and polynomial regression to calculate Gapi values, enabling early sorting and tuning of front-end process tools.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional metrology tools are used to measure wafer geometry, then measurements can be obtained after initial fabrication stages, but these measurements are insufficient to predict overlay errors caused by elastic deformation during further processing
Solution Approach 1:
The patent applies preliminary action by measuring wafer geometry at the front-end processing stage (after slicing, grinding, lapping, and edge rounding) before the wafer undergoes fabrication processes that cause elastic deformation. This early measurement captures the initial wafer shape characteristics, allowing prediction of future overlay errors before they occur during back-end processing. The Gapi metric is calculated from these preliminary measurements to identify wafers that will develop distortion problems later in manufacturing.
2Measurement precision
If high accuracy inspection tools are used to measure wafer distortions, then overlay errors can be characterized between patterning steps, but these tools require a polished surface and measurements can only be taken after at least part of the fabrication process has begun
Solution Approach 1:
The patent performs wafer geometry measurements at the front-end processing stage, well before the back-end fabrication processes begin. This preliminary measurement approach eliminates the time delay associated with waiting for polishing and fabrication steps to complete before measurement can occur. The system calculates the Gapi metric from early measurements to identify and separate wafers that will develop distortion problems, enabling proactive quality control rather than reactive inspection.
Solution Approach 2:
The patent extracts the essential geometry measurement capability from the complex high-accuracy inspection tools that require polished surfaces. By using measurements taken at the front-end processing stage (when surfaces are not yet polished), the system separates the measurement function from the restrictive conditions of polished surface requirements and back-end facility dependencies. This extraction enables earlier measurement without requiring the full fabrication process to commence.
3Productivity
If wafers are processed through multiple fabrication stages, then integrated circuits can be printed on the wafer surface, but elastic deformation occurs resulting in changes in wafer shape and overlay errors
Solution Approach 1:
The patent applies preliminary action by measuring wafer geometry at the front-end processing stage and calculating the Gapi metric before the wafer undergoes fabrication processes. This early assessment allows identification of wafers that are prone to elastic deformation and shape changes during subsequent processing. By separating and discarding wafers with high Gapi values before fabrication begins, the system prevents overlay errors from developing during the multi-stage fabrication process, ensuring manufacturing precision is maintained throughout production.
Solution Approach 2:
The patent applies preliminary anti-action by identifying and discarding wafers with high Gapi values (indicating susceptibility to elastic deformation) before they enter the fabrication process. This preliminary rejection prevents the harmful effect of shape changes and overlay errors from occurring during fabrication. The system takes counter-action in advance by removing problematic wafers from the production stream, thereby protecting the overall manufacturing precision of the fabrication process.
Data Source
AI summary
A method for processing semiconductor wafers includes obtaining measurement data of an edge profile of a semiconductor wafer processed by a front-end process tool. The method includes determining an edge profile center point based on the measurement data, generating a raw height profile, and generating an ideal edge profile. The method further includes generating a Gapi edge profile of the semiconductor wafer based on the raw height profile and the ideal edge profile and calculating a Gapi edge value of the semiconductor wafer based on the Gapi edge profile. The generated Gapi edge profile and/or the calculated Gapi edge value may be used to tune the front-end process tool and/or sort the semiconductor wafer for polishing. Systems include at least a front-end process tool, a flatness measurement tool, and a computing device.