Wafer Edge Electrode Layout to Block Plating Solution Ingress

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Solution Overview

Problem

Existing semiconductor manufacturing methods face challenges in effectively forming electrodes on wafer surfaces while preventing plating solution penetration and deformation of thin wafers, particularly those made of materials like SiC monocrystal, which are slow in plating reaction speed.

Innovation Solution

A wafer structure with a second electrode covering the inward portion of the second main surface to expose the peripheral edge as a plating reaction inhibiting portion, combined with a protective tape that adheres to the edge with higher adhesion than to the electrode, preventing plating solution ingress and wafer deformation during plating processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a second electrode covers the entire area of the second main surface to ensure complete coverage, then electrode coverage is improved, but plating solution can penetrate to the wafer back surface causing abnormal plating film formation

Engineering Contradiction:
Improveelectrode coverageVSAvoidplating solution penetration
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent divides the second main surface into two functional zones: a central electrode formation area and a peripheral edge area. The second electrode covers only the inward portion (central area) while intentionally exposing the peripheral edge, creating distinct functional segments that prevent plating solution penetration while maintaining electrode coverage where needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different treatments to different regions of the wafer surface. The inward portion receives the second electrode for proper electrical connection, while the peripheral edge remains exposed to serve as a plating reaction inhibiting portion. This local differentiation resolves the contradiction between coverage and penetration prevention.

Inventive Principle:
Principle #3Local quality

2Ease of operation

If the wafer is made thin to reduce deformation during handling, then handling ease is improved, but plating solution can penetrate through to the back surface causing abnormal plating

Engineering Contradiction:
Improvehandling easeVSAvoidplating solution penetration
Core Design Contradiction:
Ease of operationVSObject-affected harmful factors

Solution Approach 1:

The patent preemptively prevents plating solution penetration by exposing the peripheral edge of the second main surface to act as a plating reaction inhibiting portion. This preliminary protective measure stops the plating solution before it can penetrate through thin wafers to the back surface, allowing thin wafers to be handled easily without risking abnormal plating.

Inventive Principle:
Principle #9Preliminary anti-action

3Reliability

If SiC monocrystal wafers are used for high performance, then device performance is improved, but plating reaction speed becomes too slow for efficient manufacturing

Engineering Contradiction:
Improvedevice performanceVSAvoidplating reaction speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent concentrates the plating process to specific local areas (first electrode regions) rather than attempting to plate the entire wafer surface. By exposing only necessary peripheral edges and covering the rest with protective tape, the plating solution is confined to targeted areas, improving plating efficiency for SiC wafers while maintaining their high performance characteristics.

Inventive Principle:
Principle #3Local quality

4Strength

If protective tape is adhered strongly to prevent peeling, then tape adhesion is improved, but tape may peel from the electrode surface causing plating defects

Engineering Contradiction:
Improvetape adhesionVSAvoidplating film quality
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The patent creates different adhesion conditions for different surfaces: the protective tape adheres strongly to the peripheral edge (plating reaction inhibiting portion) to prevent peeling, while the electrode surface is designed to have lower adhesion to prevent tape peeling that would cause plating defects. This local differentiation of adhesion properties resolves the contradiction.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the reliability of semiconductor device manufacturing by preventing abnormal plating film formation and wafer deformation, ensuring high yield and quality of semiconductor devices, especially for SiC monocrystal wafers.

Implementation Method 1

a protective tape 45 adhered to the peripheral edge portion and the second electrode 24

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 2

forming a plating film 51 on the first electrode 18 by a plating method

Methodology Applied
Scientific EffectElectroplating: Electroplating

Data Source

PatentUS20250112080A1Wafer structure and method for manufacturing semiconductor devices
Publication Date: 2025.04.03 ROHM CO LTD
  • US20250112080A1 patent drawing
  • US20250112080A1 patent drawing
  • US20250112080A1 patent drawing

AI summary

The wafer structure includes a wafer which has a first surface on one side and a second surface on the other side, a first electrode which covers the first surface, a second electrode which covers an inward portion of the second surface such as to expose a peripheral edge portion of the second surface, and a protective tape which has characteristics that an adhesion to the peripheral edge portion of the second surface is higher than an adhesion to the second electrode and which is adhered to the peripheral edge portion of the second surface and the second electrode.