Wafer Electrode Layout That Keeps Kerf Regions Saw-Clean

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Solution Overview

Problem

Conventional methods for forming electrodes above semiconductor bodies and kerf regions of a wafer are inefficient, as materials like aluminum and copper tend to adhere to saw blades during wafer separation, requiring the removal of electrodes after electrical characterization, which is inconvenient.

Innovation Solution

A method involving the formation of a first electrically conducting layer on an insulating layer above both semiconductor bodies and kerf regions, followed by patterning to create device and kerf electrodes. A second electrically conducting layer is then added and patterned to enhance the device electrodes, while ensuring the second layer is removed from the kerf region to prevent adherence issues during wafer separation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If aluminum or copper materials are used for electrodes above kerf regions, then electrical characteristics can be measured, but the materials adhere to saw blades during wafer separation

Engineering Contradiction:
Improveelectrical characteristics measurementVSAvoidmaterial adherence to saw blades
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent applies different material properties to different regions: aluminum or copper is used for device electrodes above semiconductor bodies where electrical measurement is needed, while a different material (or no electrode) is used above kerf regions to prevent saw blade adherence. This local differentiation resolves the contradiction by allowing electrical measurement where needed while preventing harmful adherence where not needed.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The electrode structure is segmented into device electrodes above semiconductor bodies and kerf electrodes above kerf regions. The patterning process creates distinct electrode regions with different material compositions, allowing the device electrodes to provide electrical measurement capability while the kerf electrode structure is designed to prevent adherence to saw blades during separation.

Inventive Principle:
Principle #1Segmentation

2Object-generated harmful factors

If electrodes are removed from kerf regions after measurement, then saw blade adherence is prevented, but additional processing steps are required

Engineering Contradiction:
Improvesaw blade adherence preventionVSAvoidprocessing steps
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent incorporates electrode formation above kerf regions directly into the standard electrode formation process sequence, performing the action beforehand rather than requiring subsequent removal. The kerf electrodes are formed with appropriate material selection during the initial patterning process, preventing saw blade adherence issues before they occur and eliminating the need for additional removal steps.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If the same process sequences are used for forming electrodes above semiconductor bodies and kerf regions, then manufacturing efficiency is improved, but material adherence to saw blades occurs

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidmaterial adherence to saw blades
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

While maintaining the same overall process sequences for electrode formation across the entire wafer (preserving manufacturing efficiency), the patent applies local quality control through selective patterning. The patterning step creates different electrode configurations in different regions: complete electrodes above semiconductor bodies and modified kerf electrodes above kerf regions, thus preventing saw blade adherence without requiring separate process sequences.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250113578A1Method for forming electrodes, semiconductor device and semiconductor wafer
Publication Date: 2025.04.03 INFINEON TECH AUSTRIA AG
  • US20250113578A1 patent drawing
  • US20250113578A1 patent drawing
  • US20250113578A1 patent drawing

AI summary

Disclosed is a method for forming electrodes, a semiconductor device, and a semiconductor wafer. The semiconductor wafer includes: a plurality of semiconductor bodies and kerf regions arranged between the semiconductor bodies; at least one device electrode arranged above at least one of the semiconductor bodies; and at least one kerf electrode arranged above at least one of the kerf regions. The at least one device electrode includes a first device electrode layer patterned from a first electrically conducting layer and a second device electrode layer patterned from a second electrically conducting layer different from the first electrically conducting layer. The at least one kerf electrode includes a first kerf electrode layer patterned from the first electrically conducting layer and is devoid of a second kerf electrode layer.