3D Wafer Heat Dissipation Layer for Thermal Management

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Solution Overview

Problem

Three-dimensional integrated circuits face significant heat accumulation issues due to their compact multi-layer structure, which traditional flat cooling technologies cannot effectively address, potentially leading to device instability and failure under high temperature conditions.

Innovation Solution

A semiconductor cooling method and structure involving the integration of heat dissipation layers made of good conductive materials, such as metals like aluminum, copper, and tungsten, arranged above metallic device structure layers with holes connecting to adjacent layers, and conducting wires on the surface of wafers to export heat externally, ensuring even heat distribution and dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If three-dimensional integrated circuits use compact multi-layer structure, then packaging density and operating speed are improved, but heat accumulation increases and traditional flat cooling technology becomes ineffective

Engineering Contradiction:
Improvepackaging densityVSAvoidheat accumulation
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The patent transitions from traditional two-dimensional flat cooling to three-dimensional heat dissipation structures. Heat dissipation layers are inserted between stacked wafers, and heat dissipation holes are formed vertically through multiple layers, enabling heat to be conducted in the vertical dimension rather than relying solely on horizontal surface area. This dimensional change allows effective heat management in compact 3D integrated circuits.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces heat dissipation layers as intermediary structures between the semiconductor device layers and the external environment. These heat dissipation layers, made of materials with high thermal conductivity, act as thermal mediators that conduct heat away from the active device regions through the vertical heat dissipation holes, preventing heat accumulation at critical locations.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Temperature

If heat dissipation structures are added to bonded wafers, then heat dissipation effect is improved, but bonding quality may be compromised

Engineering Contradiction:
Improveheat dissipation effectVSAvoidbonding quality
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The heat dissipation layers are prepared and positioned on the wafer surfaces before the bonding process. The structures are pre-formed with appropriate patterns and positions, ensuring that when bonding occurs, the heat dissipation pathways are already in place and will not interfere with the bonding interface. This preliminary preparation ensures both bonding quality and heat dissipation functionality.

Inventive Principle:
Principle #10Preliminary action

3Temperature

If complex heat dissipation structures are implemented, then heat dissipation performance is improved, but manufacturing complexity and costs increase

Engineering Contradiction:
Improveheat dissipation performanceVSAvoidmanufacturing complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The heat dissipation layers serve multiple functions: they provide thermal conduction pathways, act as structural support between stacked wafers, and can be integrated with existing interconnect structures. By making the heat dissipation structure multi-functional, the patent avoids adding purely thermal management components that would increase complexity, instead leveraging existing structural elements for dual purposes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively disperses and dissipates heat evenly within the bonded wafers, preventing local heat accumulation and extending the device's operational life without compromising bonding quality or increasing production costs.

Implementation Method 1

a heat dissipation layer is arranged in the free area above at least one of the metallic device structure layers, and the heat dissipation layer connects to an adjacent metallic device structure layer located under it wherein the material of each of said heat dissipation layers is good conductors of heat

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS9589937B2Semiconductor cooling method and method of heat dissipation
Publication Date: 2017.03.07 WUHAN XINXIN SEMICON MFG CO LTD
  • US9589937B2 patent drawing
  • US9589937B2 patent drawing
  • US9589937B2 patent drawing

AI summary

The invention provides a semiconductor cooling method that comprises: providing two wafers which require to be treated by a mixed bonding process, wherein each of the wafers being provided with several metallic device structure layers therein. A heat dissipation layer is set in at least one of the wafers and arranged in the free area above at least one of the metallic device structure layers, and the heat dissipation layer connects to the adjacent metallic device structure layer and the invention provides a method of heat dissipation that comprises providing at least two wafers to be bonded; and arranging some conducting wires on a surface of wafers. In addition, the method includes the steps of performing a bonding process to form a device with bonded wafers, wherein one end of the conducting wires locates in the region where the wafers generate heat, and another end extends to an external of wafers.