Self-Aligned Double Patterning Wafer Layout Modification
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Solution Overview
Problem
The increasing complexity of semiconductor devices poses challenges in forming fine patterns beyond the resolution limit of photolithography processes, necessitating innovative methods for pattern formation in wafer design.
Innovation Solution
The method involves preparing initial layouts with specific design patterns and modifying them to create sub-layouts, which are then used in a self-aligned double patterning process to form final patterns, utilizing extra patterns to extend beyond the resolution limits of traditional photolithography.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithography processes are used to form patterns, then manufacturing simplicity is maintained, but pattern resolution cannot exceed the photolithography resolution limit
Solution Approach 1:
The patterning process is divided into multiple discrete steps: forming mandrels at initial locations, depositing spacers on mandrel sidewalls, selectively removing mandrels, and repeating the process. This segmentation allows each step to be optimized independently, achieving sub-lithographic resolution while maintaining process control
Solution Approach 2:
Mandrels are pre-formed at locations where final patterns are NOT desired, serving as templates for subsequent spacer deposition. This preliminary action enables precise pattern definition through self-aligned spacer formation, achieving resolutions below the photolithography limit
2Manufacturing precision
If self-aligned double patterning is implemented, then pattern resolution below photolithography limit is achieved, but process complexity increases
Solution Approach 1:
The process uses self-aligned spacer deposition where spacers automatically form on mandrel sidewalls without additional alignment steps. The mandrels serve their own purpose as alignment references for spacer formation, eliminating complex alignment procedures and simplifying the overall manufacturing process despite multiple steps
Solution Approach 2:
Multiple functions are merged into single process steps: mandrels serve as both structural elements and alignment references, spacers are formed conformally on all mandrels simultaneously, and selective removal is achieved through material selectivity rather than precise patterning. This merging reduces the number of discrete operations required
Data Source
AI summary
Provided are methods of forming patterns of wafers using self-aligned double patterning processes. The methods include preparing an initial layout having a first design pattern, a second design pattern, and a third design pattern disposed between the first design pattern and the second design pattern, extracting a first sub-layout including the first design pattern and a second sub-layout including the second design pattern from the initial layout using a computer, forming a first modified sub-layout including a first modified design pattern obtained by modifying the first design pattern of the first sub-layout using the computer, generating a modified layout including the first modified sub-layout and the second sub-layout using the computer, and performing a double patterning process using the modified layout.